Research

Advancing Innovation in Analog, Mixed-Signal, and RF integrated circuits (IC) Through Industry-Academic Collaboration

Research

Current Projects 2025/26

Machine Learning Inspired Cross-Talk Compensation in Wireline Links – Tejasvi Anand (OSU)
Reconfigurable, Low-Power, Low-Jitter, Multi-Phase Signal Generation for Next-Generation Connectivity – Deukhyoun Heo (WSU)
Low-Power Integrated Circuit and Integration Approaches for Intelligent Sensor Systems – Matthew Johnston (OSU)
High-Performance Mixed-Signal Circuits in CMOS – Un-Ku Moon (OSU)
A Co-design Assistant for EM Design and Development of RF Integrated Circuits – Arun Natarajan & Alireza Aghasi (OSU)
Over-Sampling Phase Noise Cancellation Phase-Locked Loop – Jacques “Chris” Rudell (UW)
Micro-Power CMOS Interface Circuits – Gabor Temes (OSU)
Machine Learning Performance Enhancement of Data Converters – Huazheng Wang (OSU)
Modeling and Design of Passives for RF and Millimeter-Wave Integrated Circuits – Andreas Weisshaar (OSU)

Research

CDADIC Publications (since 2012)

2025

M. Ali Mokri, E. Afshar, M. Aminul Hoque, S. Miraslani, S. Mirabbasi and D. Heo, “A Compact Single-Ended Common-Base Doherty PA in 90-nm BiCMOS With 37.3% Peak PAE for 5G Beamforming Arrays,” in IEEE Transactions on Microwave Theory and Techniques, vol. 73, no. 1, pp. 540-552, Jan. 2025, doi: 10.1109/TMTT.2024.3432602.

M. A. Hoque and D. Heo, “A Triple-Band, High DC-to-RF Efficiency, Multicore VCO With a Dual-Path Inductor and Mode-Switching Capacitor,” in IEEE Transactions on Microwave Theory and Techniques, vol. 73, no. 2, pp. 998-1008, Feb. 2025, doi: 10.1109/TMTT.2024.3439653.

Q. Xu et al., “A TTD-Based Fast Precise Localization Enabled by Passive–Active Signal Combiner With Negative-Capacitance Stabilized RAMP,” in IEEE Journal of Solid-State Circuits, doi: 10.1109/JSSC.2025.3546958.

T. -H. Chou et al., “System-on-Chip for Flow Cytometry with Impedance Measurement and Integrated Real-time Size Classification,” in IEEE Transactions on Biomedical Circuits and Systems, doi: 10.1109/TBCAS.2025.3576317.

S. Yu, L. Marun and M. L. Johnston, “A Differential Impedance Flow Cytometry Front-End with Baseline Current Cancellation,” in IEEE Transactions on Biomedical Circuits and Systems, doi: 10.1109/TBCAS.2025.3585089.

H. Abbasi, A. Slater, F. Beheshti, S. Poolakkal and S. Gupta, “A Four-Element True-Time-Delay Slice-Based Receiver Array for FR3 Upper Mid-Band Wireless,” in IEEE Journal of Solid-State Circuits, doi: 10.1109/JSSC.2025.3585532.

H. Wang, F. Adin, U. -K. Moon and G. C. Temes, “An 89.5 dB SNDR 500 kHz BW Largely Passive Fourth-Order Noise-Coupled Delta-Sigma Modulator,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 72, no. 8, pp. 3744-3752, Aug. 2025, doi: 10.1109/TCSI.2025.3538493.

F. Adin, H. Wang, L. Shi, R. Singh, E. Hancioglu and G. C. Temes, “98-dB SNDR Multi-Residue Two-Step Incremental ADC With Two-Capacitor SAR,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 72, no. 8, pp. 988-992, Aug. 2025, doi: 10.1109/TCSII.2025.3552742.

2024

D. Kar, S. Mohapatra, M. A. Hoque and D. Heo, “A 14 GHz Integer-N Sub-Sampling PLL With RMS-Jitter of 85.4 fs Occupying an Ultra Low Area of 0.0918 mm2,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 71, no. 2, pp. 595-605, Feb. 2024, doi: 10.1109/TCSI.2023.3341401.

S. Mohapatra, E. Afshar, Z. Zhou and D. Heo, “7.9 An 8b 6-12GHz 0.18mW/GHz DC Modulated Ramp-Based Phase Interpolator in 65nm CMOS Process,” 2024 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, 2024, pp. 140-142, doi: 10.1109/ISSCC49657.2024.10454438.

X. Li, Y. -H. Huang, F. Yin and J. C. Rudell, “A 2.4-GHz Full-Duplex Transceiver With Broadband, Linearity-Enhanced, and Long-Delay Spread Self-Interference Cancellation,” in IEEE Journal of Solid-State Circuits, vol. 59, no. 4, pp. 1246-1260, April 2024, doi: 10.1109/JSSC.2023.3312675.

A. Aghighi, M. Essawy and A. S. Natarajan, “A Frequency Doubler With Second Harmonic Feedback for Wideband, Efficient Frequency Multiplication at Millimeter-Wave,” in IEEE Transactions on Microwave Theory and Techniques, vol. 72, no. 5, pp. 2704-2715, May 2024, doi: 10.1109/TMTT.2024.3367882.

M. Essawy, K. Rashed, A. Aghighi and A. S. Natarajan, “A Low-Noise Dual-Path Self-Interference Cancellation Architecture for Watt-Level TX Power Handling in Simultaneous Transmit and Receive,” in IEEE Journal of Solid-State Circuits, vol. 59, no. 5, pp. 1337-1350, May 2024, doi: 10.1109/JSSC.2024.3355067.

M. Li et al., “An Easy-to-Drive Discrete-Time ADC Topology Using Digital Predictive Level-Shifting,” 2024 IEEE International Symposium on Circuits and Systems (ISCAS), Singapore, Singapore, 2024, pp. 1-5, doi: 10.1109/ISCAS58744.2024.10558507.

Q. Xu, C. -C. Lin, A. Wadaskar, H. Hu, D. Cabric and S. Gupta, “A 10ns Delay Range 1.5GHz BW True-Time-Delay Array-Based Passive-Active Signal Combiner with Negative-Cap Stabilized RAMP for Fast Precise Localization,” 2024 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Washington, DC, USA, 2024, pp. 227-230, doi: 10.1109/RFIC61187.2024.10600032.

M. A. Mokri, S. Miraslani, M. A. Hoque and D. Heo, “A Dual-Path Transformer-Based Multiband Power Amplifier for mm-Wave 5G Applications,” in IEEE Journal of Solid-State Circuits, vol. 59, no. 6, pp. 1643-1655, June 2024, doi: 10.1109/JSSC.2023.3344073.

F. Adin, H. Wang, L. Shi, R. Singh, E. Hancioglu and G. C. Temes, “Multi-Residue Two-Step Incremental ADC,” 2024 IEEE 67th International Midwest Symposium on Circuits and Systems (MWSCAS), Springfield, MA, USA, 2024, pp. 951-955, doi: 10.1109/MWSCAS60917.2024.10658736.

H. Wang, F. Adin, U. -K. Moon and G. C. Temes, “Wideband Low-Distortion Noise-Coupled Delta-Sigma ADC,” 2024 IEEE 67th International Midwest Symposium on Circuits and Systems (MWSCAS), Springfield, MA, USA, 2024, pp. 1226-1229, doi: 10.1109/MWSCAS60917.2024.10658689.

M. Megahed, Y. Chun, Z. Wang and T. Anand, “An SNR-Enhanced 8-Ary (SNRE-8) Modulation Technique for Wireline Transceivers Using Pulse Width, Position, and Amplitude Modulation,” in IEEE Journal of Solid-State Circuits, vol. 59, no. 8, pp. 2492-2505, Aug. 2024, doi: 10.1109/JSSC.2024.3361499.

J. Dawes, T. -H. Chou, B. Shen and M. L. Johnston, “Microfluidic Lab-on-CMOS Packaging Using Wafer-Level Molding and 3D-Printed Interconnects,” in IEEE Transactions on Biomedical Circuits and Systems, vol. 18, no. 4, pp. 821-833, Aug. 2024, doi: 10.1109/TBCAS.2024.3419804 (invited paper).

X. Lin, M. Megahed, B. Bose and T. Anand, “A 4-Channel 60Gb/s Aggregate & 0.167pJ/bit/dB Transceiver Achieving 33% Higher Pin-Efficiency Over Differential Using 4b6w Balanced Coding,” 2024 IEEE European Solid-State Electronics Research Conference (ESSERC), Bruges, Belgium, 2024, pp. 301-304, doi: 10.1109/ESSERC62670.2024.10719517.

X. Li et al., “A Highly Tunable RF Self-Interference Canceler with Near Real-Time Machine-Learning Augmented Adaptation for Full-Duplex Radio Applications,” 2024 IEEE European Solid-State Electronics Research Conference (ESSERC), Bruges, Belgium, 2024, pp. 436-439, doi: 10.1109/ESSERC62670.2024.10719413.

T. -H. Chou, S. Yu, C. Wilson, J. Dawes, J. Park and M. L. Johnston, “An Impedance Measurement System-on-Chip for Flow Cytometry with On-Chip Size Classification,” 2024 IEEE Biomedical Circuits and Systems Conference (BioCAS), Xi’an, China, 2024, pp. 1-5, doi: 10.1109/BioCAS61083.2024.10798375.

H. -T. Lin, F. Iseini and A. Weisshaar, “Tunable True-Time-Delay Unit Based on Bridged T-Coil,” 2024 IEEE 33rd Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS), Toronto, ON, Canada, 2024, pp. 1-3, doi: 10.1109/EPEPS61853.2024.10753922.

F. Iseini et al., “A Tunable Inductor Peaking Technique for Optical Communication Systems,” 2024 IEEE 33rd Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS), Toronto, ON, Canada, 2024, pp. 1-3, doi: 10.1109/EPEPS61853.2024.10753708.

F. Beheshti, R. Li, S. Gupta and D. Cabric, “Early-Late Correlation for Wideband Interference AoA Estimation and Suppression in Analog Uniformly Spaced Linear TTD Arrays,” 2024 58th Asilomar Conference on Signals, Systems, and Computers, Pacific Grove, CA, USA, 2024, pp. 639-646, doi: 10.1109/IEEECONF60004.2024.10943098.

A. Slater, H. Abbasi, S. Poolakkal, F. Beheshti and S. Gupta, “Enhancing Continuous Beam Angle Resolution for Next Generation Wireless Systems: A Multi-Stage Phase-Shifting Polyphase Filters Approach,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 71, no. 11, pp. 5200-5210, Nov. 2024, doi: 10.1109/TCSI.2024.3425861.

S. Yu and M. L. Johnston, “A 99.1-dB SFDR, 87.1-dB SNDR, 50-kS/s 3rd-Order Continuous-Time Incremental ADC With Current-Controlled-Oscillator Quantizer,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 71, no. 12, pp. 4799-4803, Dec. 2024, doi: 10.1109/TCSII.2024.3419792.

J. Park and M. L. Johnston, “A Sub-0.1% THD Sinusoidal-Signal Generator for Impedance Measurement Using a Delta-Sigma-Modulated Look-Up Table,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 71, no. 12, pp. 4794-4798, Dec. 2024, doi: 10.1109/TCSII.2024.3419705.

2023

H. Bialek, M. Johnston and A. Natarajan, “31.8 A 0.4-to-0.95GHz Distributed N-Path Noise-Cancelling Ultra-Low-Power RX with Integrated Passives Achieving −85dBm/100kb/s Sensitivity, −41dB SIR and 174dB RX FoM in 22nm CMOS,” 2023 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, 2023, pp. 474-476, doi: 10.1109/ISSCC42615.2023.10067338.

J. Liu and D. J. Allstot, “Compressed Sensing Σ-Δ Modulators and a Recovery Algorithm for Multi-Channel Wireless Bio-Signal Acquisition,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 70, no. 4, pp. 1429-1438, April 2023, doi: 10.1109/TCSI.2023.3237616.

S. Sengupta and M. L. Johnston, “A SiPM-Based Gamma Spectrometer With Field-Programmable Energy Binning for Data-Efficient Isotope Analysis,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 70, no. 3, pp. 1133-1146, March 2023, doi: 10.1109/TCSI.2022.3199484 (invited paper).

M. Megahed and T. Anand, “A Sub-μW Energy Harvester Architecture With Reduced Top/Bottom Plate Switching Loss Achieving 80.66% Peak Efficiency in 180-nm CMOS,” in IEEE Journal of Solid-State Circuits, vol. 58, no. 5, pp. 1386-1399, May 2023, doi: 10.1109/JSSC.2023.3241878.

J. Park and M. L. Johnston, “A Sinusoidal Signal Generator Using a Delta-Sigma Modulated Look-Up Table and Analysis of Dither,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 70, no. 5, pp. 1764-1768, May 2023, doi: 10.1109/TCSII.2023.3261062 (invited paper).

J. Kamat, C. -C. Lin, P. Arora and S. Gupta, “A Review of CMOS Non-Foster Circuits,” 2023 IEEE International Symposium on Circuits and Systems (ISCAS), Monterey, CA, USA, 2023, pp. 1-5, doi: 10.1109/ISCAS46773.2023.10182082.

M. Li, C. Y. Lee, H. Wang, G. C. Temes and U. -K. Moon, “A 16- Bit 100kHz Bandwidth Pseudo-Pseudo-Differential Delta-Sigma ADC,” 2023 IEEE International Symposium on Circuits and Systems (ISCAS), Monterey, CA, USA, 2023, pp. 1-5, doi: 10.1109/ISCAS46773.2023.10181747.

H. Wang and G. C. Temes, “A Low-Distortion Power-Efficient Feedforward Technique for DT Delta-Sigma ADCs,” 2023 IEEE International Symposium on Circuits and Systems (ISCAS), Monterey, CA, USA, 2023, pp. 1-4, doi: 10.1109/ISCAS46773.2023.10181444.

A. Aghighi, M. Essawy and A. Natarajan, “A 47 GHz to 70 GHz Frequency Doubler Exploiting 2nd-Harmonic Feedback with 10.1 dBm Psat and ntotal of 22% in 65 nm CMOS,” 2023 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), San Diego, CA, USA, 2023, pp. 161-164, doi: 10.1109/RFIC54547.2023.10186145.

M. Essawy, K. Rashed, A. Aghighi and A. Natarajan, “A Frequency-Tunable Dual-Path Frequency-Translated Noise-Cancelling Self-Interference Canceller RX with>16dBm SI Power-Handling in 65nm CMOS,” 2023 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), San Diego, CA, USA, 2023, pp. 229-232, doi: 10.1109/RFIC54547.2023.10186163.

J. Baylon, M. A. Hoque and D. Heo, “Spanning the Spectrum: High-Performance Signal Source Design for the Millimeter-Wave Age,” in IEEE Microwave Magazine, vol. 24, no. 7, pp. 16-28, July 2023, doi: 10.1109/MMM.2023.3265457.

V. Vesely, C. Y. Lee, T. Anand and U. -K. Moon, “PLL-SAR: A New High-Speed Analog to Digital Converter Architecture,” 2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS), Tempe, AZ, USA, 2023, pp. 84-88, doi: 10.1109/MWSCAS57524.2023.10405967.

A. V. Kayyil, B. Qiao and D. Allstot, “A Digitally Configurable Outphasing Switched-Capacitor-Based RF Transmitter,” 2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS), Tempe, AZ, USA, 2023, pp. 664-668, doi: 10.1109/MWSCAS57524.2023.10406097.

Q. Xu, C. -C. Lin, H. Hut and S. Gupta, “Common-Mode Drift Resilient Ring-Oscillator-Based Time-Domain Filter for Next-Generation Wireless,” 2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS), Tempe, AZ, USA, 2023, pp. 991-995, doi: 10.1109/MWSCAS57524.2023.10406147.

J. Liu and D. J. Allstot, “A Chopper-Stabilized Switched-Capacitor Front-End for Peripheral Nervous System Recording,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 70, no. 8, pp. 3065-3074, Aug. 2023, doi: 10.1109/TCSI.2023.3282555.

S. Yu, T. -H. Chou, S. Bose, J. Cook, J. Park and M. L. Johnston, “A Reconfigurable Tri-Mode Frequency-Locked Loop Readout Circuit for Biosensor Interfaces,” in IEEE Transactions on Biomedical Circuits and Systems, vol. 17, no. 4, pp. 768-781, Aug. 2023, doi: 10.1109/TBCAS.2023.3288505 (invited paper).

T. -H. Chou, S. Yu, S. Bose, J. Cook, J. Park and M. L. Johnston, “Wireless, Multi-Sensor System-on-Chip for pH and Amperometry Powered by Body Heat,” in IEEE Transactions on Biomedical Circuits and Systems, vol. 17, no. 4, pp. 782-794, Aug. 2023, doi: 10.1109/TBCAS.2023.3286348 (invited paper).

S. Mohapatra, C. -C. Lin, S. Gupta and D. Heo, “Low-Power Process and Temperature-Invariant Constant Slope-and-Swing Ramp-Based Phase Interpolator,” in IEEE Journal of Solid-State Circuits, vol. 58, no. 8, pp. 2267-2277, Aug. 2023, doi: 10.1109/JSSC.2023.3242935.

H.-T. Lin and A. Weisshaar, “Robust and Efficient Design of On-Chip Compact Delay Units Based on Bridged T-Coil,” SRC TECHCON 2023, Sept. 2023.

S. Gupta, B. Jann, M. Essawy, K. Rashed and A. Natarajan, “A Broadband LNA and Sub-Harmonic Mixer Based Multi-Mode RX in 22nm CMOS,” 2023 18th European Microwave Integrated Circuits Conference (EuMIC), Berlin, Germany, 2023, pp. 1-4, doi: 10.23919/EuMIC58042.2023.10288916.

J. Dawes, T. -H. Chou and M. L. Johnston, “Lab-on-CMOS Packaging using Wafer-Level Molding and Direct-Write 3D-Printed Interconnects,” 2023 IEEE Biomedical Circuits and Systems Conference (BioCAS), Toronto, ON, Canada, 2023, pp. 1-5, doi: 10.1109/BioCAS58349.2023.10388923.

H. -T. Lin and A. Weisshaar, “Robust and Efficient Design of On-Chip Compact Delay Units Based on Bridged T-Coil,” 2023 IEEE 32nd Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS), Milpitas, CA, USA, 2023, pp. 1-3, doi: 10.1109/EPEPS58208.2023.10314869.

C. -C. Lin, Q. Xu, H. Hu and S. Gupta, “Design Considerations of Time-Interleaved Discrete-Time Beamformers Toward Wideband Communications,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 70, no. 11, pp. 4068-4072, Nov. 2023, doi: 10.1109/TCSII.2023.3282628.

M. A. Hoque et al., “Highly Efficient Multiband Harmonic-Tuned GaN RF Synchronous Rectifier,” in IEEE Transactions on Microwave Theory and Techniques, vol. 71, no. 11, pp. 5060-5072, Nov. 2023, doi: 10.1109/TMTT.2023.3276065.

C.-H. Chen and G. C. Temes, Incremental Data Converters for Sensor Interfaces, Wiley-IEEE Press, Nov. 2023, ISBN: 978-1-394-17840-7.

H. Bialek, M. L. Johnston and A. Natarajan, “A Highly Integrated Distributed Mixer Receiver for Low-Power Wireless Radios,” in IEEE Journal of Solid-State Circuits, vol. 58, no. 12, pp. 3421-3432, Dec. 2023, doi: 10.1109/JSSC.2023.3317778.

M. Li et al., “A Rail-to-Rail 12 MS/s 91.3 dB SNDR 94.1 dB DR Two-Step SAR ADC With Integrated Input Buffer Using Predictive Level-Shifting,” in IEEE Journal of Solid-State Circuits, vol. 58, no. 12, pp. 3555-3564, Dec. 2023, doi: 10.1109/JSSC.2023.3308121.

2022

A. Aghighi, M. Essawy and A. Natarajan, “A mm-Wave FMCW Radar RX Frontend in CMOS with Modulated Self-Interference Cancellation Path,” 2022 IEEE 22nd Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF), Las Vegas, NV, USA, 2022, pp. 13-15, doi: 10.1109/SiRF53094.2022.9720056 (Best Student Paper Finalist).

C. Y. Lee and U. -K. Moon, “A 0.0375mm2 203.5µW 108.8dB DR DT Single-Loop DSM Audio ADC Using a Single-Ended Ring-Amplifier-Based Integrator in 180nm CMOS,” 2022 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, 2022, pp. 412-414, doi: 10.1109/ISSCC42614.2022.9731606.

B. Shen, S. Bose and M. L. Johnston, “A Frequency-Locked Oscillator Using Complex RC Impedance IQ-Balancing,” in IEEE Journal of Solid-State Circuits, vol. 57, no. 3, pp. 677-687, March 2022, doi: 10.1109/JSSC.2022.3140605.

A. Hasler, C. Votzke, C. Wilson, S. Lam, J. Kim and M. L. Johnston, “Stretchable Electronics Fabrication Techniques for Wearable Glove Sensors using Encapsulated Liquid Metal Paste,” 2022 Opportunity Research Scholars Symposium (ORSS), Atlanta, GA, USA, 2022, pp. 20-22, doi: 10.1109/ORSS55359.2022.9806039.

D. J. Allstot, U. -K. Moon and G. C. Temes, “Switched-Capacitor Circuits,” 2022 IEEE Custom Integrated Circuits Conference (CICC), Newport Beach, CA, USA, 2022, pp. 1-8, doi: 10.1109/CICC53496.2022.9772858.

H. Wang and G. C. Temes, “A Second-Order Passive Noise-Shaping SAR ADC With 4× Passive Gain and A Two-Input-Pair Comparator,” 2022 IEEE International Symposium on Circuits and Systems (ISCAS), Austin, TX, USA, 2022, pp. 1134-1135, doi: 10.1109/ISCAS48785.2022.9937887.

H. Hu, V. Vesely and U. -K. Moon, “Passive Third Order Continuous-Time ΔΣ Modulator with Q Enhancement Technique,” 2022 IEEE International Symposium on Circuits and Systems (ISCAS), Austin, TX, USA, 2022, pp. 1234-1238, doi: 10.1109/ISCAS48785.2022.9937623.

H. Hu, V. Vesely and U. -K. Moon, “Ultra-Low OSR Calibration Free MASH Noise Shaping SAR ADC,” 2022 IEEE International Symposium on Circuits and Systems (ISCAS), Austin, TX, USA, 2022, pp. 1244-1248, doi: 10.1109/ISCAS48785.2022.9937876.

B. Qiao, A. V. Kayyil and D. J. Allstot, “An Eight-core Class-G Switched-capacitor Power Amplifier with Eight Power Backoff Efficiency Peaks,” 2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Denver, CO, USA, 2022, pp. 251-254, doi: 10.1109/RFIC54546.2022.9863094.

S. Mohapatra et al., “A 345μW 1 GHz Process and Temperature Invariant Constant Slope-and-Swing Ramp-based 7-bit Phase Interpolator for True-Time-Delay Spatial Signal Processors,” 2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Denver, CO, USA, 2022, pp. 147-150, doi: 10.1109/RFIC54546.2022.9863133.

M. A. Hoque, M. Chahardori, M. A. Mokri, S. Mohapatra, D. Kar and D. Heo, “A Low Phase Noise 28 GHz VCO Using Transformer-based Q-enhanced Active Impedance Converter,” 2022 IEEE/MTT-S International Microwave Symposium – IMS 2022, Denver, CO, USA, 2022, pp. 52-55, doi: 10.1109/IMS37962.2022.9865389.

A. Kharalkar, A. Batabyal, R. Zele and S. Gupta, “A Review of Phased-Array Receiver Architectures for 5G Communications,” 2022 IEEE Region 10 Symposium (TENSYMP), Mumbai, India, 2022, pp. 1-6, doi: 10.1109/TENSYMP54529.2022.9864369.

M. Chahardori, M. A. Hoque, M. A. Mokri and D. Heo, “A Compact Mm-Wave Multi-Band VCO Based on Triple-Mode Resonator for 5G and Beyond,” 2022 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT), Busan, Korea, Republic of, 2022, pp. 156-158, doi: 10.1109/RFIT54256.2022.9882424.

S. Yu and M. L. Johnston, “A 1μW Activity-Aware Asynchronous Delta Modulator with Automated Dual-Mode Operation,” 2022 IEEE 65th International Midwest Symposium on Circuits and Systems (MWSCAS), Fukuoka, Japan, 2022, pp. 1-4, doi: 10.1109/MWSCAS54063.2022.9859396 (1st Place, Best Student Paper Award).

X. Li, Y. -H. Huang, F. Yin and J. C. Rudell, “A 2.4GHz Full-Duplex Transceiver with Broadband (+120MHz), Linearity-Calibrated and Long-Delayed Self-Interference Cancellation,” ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC), Milan, Italy, 2022, pp. 417-420, doi: 10.1109/ESSCIRC55480.2022.9911395.

D. Dosluoglu, K. -D. Chu, D. Pena-Colaiocco, I. Zhao, V. Sathe and J. C. Rudell, “A Reconfigurable Digital Beamforming V-Band Phased-Array Receiver,” ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC), Milan, Italy, 2022, pp. 493-496, doi: 10.1109/ESSCIRC55480.2022.9911486.

S. Yu and M. L. Johnston, “A 1µW activity-aware asynchronous delta modulator with automated dual-mode operation,” SRC TECHCON 2022.

Chung-Ching Lin and Subhanshu Gupta, “Theory and Implementation of Time-interleaved Discrete-time Beamformers for Wideband Communications,” SRC TECHCON 2022.

Zhiyuan Zhou, Syrine Belakaria, Aryan Deshwal, Wookpyo Hong, Jana Doppa, Partha Pratim Pande, and Deukhyoun Heo, “Design and Optimization of High Conversion Ratio Hybrid Converters: A Novel MachineLearning Approach,” TechCon 2022.

S. Yu, T. -H. Chou, J. Cook, J. Park and M. L. Johnston, “A Reconfigurable Tri-Mode Frequency-Locked Loop Readout Circuit for Biosensor Interfaces,” 2022 IEEE Biomedical Circuits and Systems Conference (BioCAS), Taipei, Taiwan, 2022, pp. 125-129, doi: 10.1109/BioCAS54905.2022.9948640 (IEEE BioCAS 2022 Best Paper Award).

T. -H. Chou, S. Yu, J. Cook, J. Park, S. Bose and M. L. Johnston, “Body-Heat Powered Biosensor Readout using Current-mode Relaxation Oscillators,” 2022 IEEE Biomedical Circuits and Systems Conference (BioCAS), Taipei, Taiwan, 2022, pp. 130-134, doi: 10.1109/BioCAS54905.2022.9948593.

C. -C. Lin et al., “Wideband Beamforming With Rainbow Beam Training Using Reconfigurable True-Time-Delay Arrays for Millimeter-Wave Wireless [Feature],” in IEEE Circuits and Systems Magazine, vol. 22, no. 4, pp. 6-25, Fourthquarter 2022, doi: 10.1109/MCAS.2022.3214408.

Q. Xu et al., “A Switching-Less True-Time-Delay-Based Beam Probing Approach for Ultra-Low Latency Wireless Communications: System Analysis and Demonstration,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 69, no. 10, pp. 4113-4117, Oct. 2022, doi: 10.1109/TCSII.2022.3178716.

B. Shen, J. Dawes and M. L. Johnston, “A 10 MΩ, 50 kHz-40 MHz Impedance Measurement Architecture for Source-Differential Flow Cytometry,” in IEEE Transactions on Biomedical Circuits and Systems, vol. 16, no. 5, pp. 766-778, Oct. 2022, doi: 10.1109/TBCAS.2022.3182905.

Z. Zhou et al., “An Inductor-First Single-Inductor Multiple-Output Hybrid DC–DC Converter With Integrated Flying Capacitor for SoC Applications,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 69, no. 12, pp. 4823-4836, Dec. 2022, doi: 10.1109/TCSI.2022.3198389.

2021

K. -D. Chu and J. C. Rudell, “A Mm-Wave Gm-Assisted Transformer-Based Matching Network 2×2 Phased-Array Receiver for 5G Communication and Radar Systems,” 2021 IEEE Radio and Wireless Symposium (RWS), San Diego, CA, USA, 2021, pp. 26-28, doi: 10.1109/RWS50353.2021.9360326.

P. Agarwal, M. Chahardori and D. Heo, “A New Boosted Active-Capacitor With Negative-Gm for Wide Tuning Range VCOs,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 68, no. 3, pp. 1080-1090, March 2021, doi: 10.1109/TCSI.2020.3043405.

J. Kim, C. Votzke, S. Bose, A. Natarajan and M. L. Johnston, “A 20 μ W, 0.05mm2 Duty-Cycled Resistor and Frequency-Locked-Loop-based Wheatstone Bridge Interface for Low Resistance Sensing Systems,” 2021 IEEE Custom Integrated Circuits Conference (CICC), Austin, TX, USA, 2021, pp. 1-2, doi: 10.1109/CICC51472.2021.9431533.

S. Sengupta and M. L. Johnston, “A Widely Reconfigurable Piecewise-Linear ADC for Information-Aware Quantization,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 68, no. 4, pp. 1073-1077, April 2021, doi: 10.1109/TCSII.2020.3031262.

S. R. Mahendra and A. Weisshaar, “A Compact and Broadband On-Chip Delay Line Design Based on the Bridged T-Coil,” 2021 IEEE 25th Workshop on Signal and Power Integrity (SPI), Siegen, Germany, 2021, pp. 1-4, doi: 10.1109/SPI52361.2021.9505174.

X. Li, F. Yin and J. C. Rudell, “Effects of Receiver Input Impedance on Nonlinear Distortion in Full-Duplex Radios,” 2021 IEEE International Symposium on Circuits and Systems (ISCAS), Daegu, Korea, 2021, pp. 1-5, doi: 10.1109/ISCAS51556.2021.9401606.

B. Qiao, A. V. Kayyil, J. S. Walling and D. J. Allstot, “I/Q-Sharing Switched-Capacitor Power Amplifier with Baseband Harmonic-Rejection and Wilkinson Combiner,” 2021 IEEE International Symposium on Circuits and Systems (ISCAS), Daegu, Korea, 2021, pp. 1-4, doi: 10.1109/ISCAS51556.2021.9401455.

A. V. Kayyil, B. Qiao and D. J. Allstot, “Linearity Improvement Techniques for CMOS Switched-Capacitor Power Amplifiers,” 2021 IEEE International Symposium on Circuits and Systems (ISCAS), Daegu, Korea, 2021, pp. 1-5, doi: 10.1109/ISCAS51556.2021.9401494.

M. Essawy, A. Aghighi, H. Bialek, A. Nagulu, H. Krishnaswamy and A. Natarajan, “A Noise-Cancelling Self-Interference Canceller with +7 dBm Self-Interference Power Handling in 0.18μ m CMOS,” 2021 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Atlanta, GA, USA, 2021, pp. 95-98, doi: 10.1109/RFIC51843.2021.9490418.

H. Hu, C. -C. Lin and S. Gupta, “A 197.1-μW Wireless Sensor SoC With an Energy-Efficient Analog Front-End and a Harmonic Injection-Locked OOK TX,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 68, no. 6, pp. 2444-2456, June 2021, doi: 10.1109/TCSI.2021.3068718.

C. -C. Lin, H. Hu and S. Gupta, “Improved Performance Tradeoffs in Harmonic Injection-Locked ULP TX for Sub-GHz Radios,” in IEEE Transactions on Microwave Theory and Techniques, vol. 69, no. 6, pp. 2885-2898, June 2021, doi: 10.1109/TMTT.2021.3064056.

C. Y. Lee, P. K. Venkatachala, A. ElShater and U. -K. Moon, “A Pseudo-Pseudo-Differential ADC Achieving 105dB SNDR in 10kHz Bandwidth Using Ring Amplifier Based Integrators,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 68, no. 7, pp. 2327-2331, July 2021, doi: 10.1109/TCSII.2021.3060011.

M. Megahed, Y. Chun, Z. Wang and T. Anand, “A 27 Gb/s 5.39 pJ/bit 8-ary Modulated Wireline Transceiver Using Pulse Width and Amplitude Modulation Achieving 9.5 dB SNR Improvement over PAM-8,” 2021 Symposium on VLSI Circuits, Kyoto, Japan, 2021, pp. 1-2, doi: 10.23919/VLSICircuits52068.2021.9492426.

S. Sengupta and M. L. Johnston, “A Multichannel Analyzer with Programmable Energy Bins for Gamma Ray Spectroscopy,” 2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Lansing, MI, USA, 2021, pp. 121-124, doi: 10.1109/MWSCAS47672.2021.9531801.

T. -H. Chou, H. Ouh, J. Kim and M. L. Johnston, “Linear and Single-Photon Avalanche Diode Dual-Mode CMOS Optical Sensor with High Frame Rate Operation,” 2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Lansing, MI, USA, 2021, pp. 271-274, doi: 10.1109/MWSCAS47672.2021.9531882.

M. Kareppagoudr, E. Caceres and G. C. Temes, “Switched-Capacitor Integrator with Slew-Rate Enhancement and Low Distortion,” 2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Lansing, MI, USA, 2021, pp. 150-153, doi: 10.1109/MWSCAS47672.2021.9531786.

R. Garg et al., “A 28-GHz Beam-Space MIMO RX With Spatial Filtering and Frequency-Division Multiplexing-Based Single-Wire IF Interface,” in IEEE Journal of Solid-State Circuits, vol. 56, no. 8, pp. 2295-2307, Aug. 2021, doi: 10.1109/JSSC.2020.3044089.

C. -C. Lin et al., “A 4-Element 800MHz-BW 29mW True-Time-Delay Spatial Signal Processor Enabling Fast Beam-Training with Data Communications,” ESSCIRC 2021 – IEEE 47th European Solid State Circuits Conference (ESSCIRC), Grenoble, France, 2021, pp. 287-290, doi: 10.1109/ESSCIRC53450.2021.9567822.

M. Chahardori, Md Aminul Hoque, and Deukhyoun Heo, “A K/Ka-Band Low Phase Noise 4-Core Triple Band Coupled VCO Based on Mode-Switching Inductor and Capacitor,” SRC TECHCON 2021.

S. R. Mahendra and A. Weisshaar, “A Compact and Broadband On-Chip Delay Line Design Based on the Bridged T-Coil,” SRC TECHCON 2021, Sept. 2021 (Won “Top 10 TECHCON Presenter Award” — Top 10 paper out of 425 submissions and 150 accepted papers.)

G. C. Temes, U. -K. Moon and D. Allstot, “Switched-Capacitor Circuits [Education],” in IEEE Circuits and Systems Magazine, vol. 21, no. 4, pp. 40-42, Fourthquarter 2021, doi: 10.1109/MCAS.2021.3118195.

J. Liu and D. J. Allstot, “A Switched-Capacitor Closed-Loop Integration Sampling Front-End for Peripheral Nerve Recording,” 2021 IEEE Biomedical Circuits and Systems Conference (BioCAS), Berlin, Germany, 2021, pp. 1-4, doi: 10.1109/BioCAS49922.2021.9645017.

B. Shen, J. Dawes and M. L. Johnston, “A 6 pArms 50 kHz-40 MHz Impedance Sensor for Source-Differential Flow Cytometry,” 2021 IEEE Biomedical Circuits and Systems Conference (BioCAS), Berlin, Germany, 2021, pp. 1-5, doi: 10.1109/BioCAS49922.2021.9644962.

L. Shi, E. Thiagarajan, R. Singh, E. Hancioglu, U. -K. Moon and G. C. Temes, “Noise-Shaping SAR ADC Using a Two-Capacitor Digitally Calibrated DAC With 82.6-dB SNDR and 90.9-dB SFDR,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 68, no. 10, pp. 4001-4012, Oct. 2021, doi: 10.1109/TCSI.2021.3098471.

X. Dong and A. Weisshaar, “Compact Design of Passive Networks in RF and Millimeter-Wave Integrated Circuits (invited),” 2021 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), Monterey, CA, USA, 2021, pp. 1-4, doi: 10.1109/BCICTS50416.2021.9682208.

2020

R. Garg et al., “4.3 A 28GHz 4-Element MIMO Beam-Space Array in 65nm CMOS with Simultaneous Spatial Filtering and Single-Wire Frequency-Domain Multiplexing,” 2020 IEEE International Solid-State Circuits Conference – (ISSCC), San Francisco, CA, USA, 2020, pp. 80-82, doi: 10.1109/ISSCC19947.2020.9063120.

Y. Xu, P. K. Venkatachala, Y. Hu, S. Leuenberger, G. C. Temes and U. -K. Moon, “A Charge-Domain Switched-Gm-C Band-Pass Filter Using Interleaved Semi-Passive Charge-Sharing Technique,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 67, no. 2, pp. 600-610, Feb. 2020, doi: 10.1109/TCSI.2019.2949018.

B. Nguyen, N. Tang, W. Hong, Z. Zhou and D. Heo, “Clock-Voltage Co-Regulator With Adaptive Power Budget Tracking for Robust Near-Threshold-Voltage Sequential Logic Circuits,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 67, no. 2, pp. 622-633, Feb. 2020, doi: 10.1109/TCSI.2019.2948944.

H. Ouh, B. Shen and M. L. Johnston, “Combined In-Pixel Linear and Single-Photon Avalanche Diode Operation With Integrated Biasing for Wide-Dynamic-Range Optical Sensing,” in IEEE Journal of Solid-State Circuits, vol. 55, no. 2, pp. 392-403, Feb. 2020, doi: 10.1109/JSSC.2019.2944856.

Z. Zhou, N. Tang, B. Nguyen, W. Hong, P. P. Pande and D. Heo, “A Wide Output Voltage Range Single-Input-Multi-Output Hybrid DC-DC Converter Achieving 87.5% Peak Efficiency With a Fast Response Time and Low Cross Regulation for DVFS Applications,” 2020 IEEE Custom Integrated Circuits Conference (CICC), Boston, MA, USA, 2020, pp. 1-4, doi: 10.1109/CICC48029.2020.9075892.

P. Payandehnia, T. He, Y. Wang and G. C. Temes, “Digital Correction of DAC Nonlinearity in Multi-Bit Feedback A/D Converters: Invited tutorial,” 2020 IEEE Custom Integrated Circuits Conference (CICC), Boston, MA, USA, 2020, pp. 1-8, doi: 10.1109/CICC48029.2020.9075916.

C. Aueamnuay, A. V. Kayyil, J. Liu, N. B. Thota and D. J. Allstot, “gm/ID Design Considerations for Subthreshold-Based CMOS Two-Stage Operational Amplifiers,” 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020, pp. 1-5, doi: 10.1109/ISCAS45731.2020.9180576

C. Aueamnuay, A. V. Kayyil, N. B. Thota, P. K. Venkatachala and D. J. Allstot, “gm/ID-Based Frequency Compensation of CMOS Two-Stage Operational Amplifiers,” 2020 IEEE International Symposium on Circuits and Systems (ISCAS), Seville, Spain, 2020, pp. 1-5, doi: 10.1109/ISCAS45731.2020.9180575.

M. Johnson et al., “Code-Domain Multiplexing for Shared IF/LO Interfaces in Millimeter-Wave MIMO Arrays,” in IEEE Journal of Solid-State Circuits, vol. 55, no. 5, pp. 1270-1281, May 2020, doi: 10.1109/JSSC.2020.2967538.

J. R. Shakya and G. C. Temes, “Efficient Calibration of Feedback DAC in Delta Sigma Modulators,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 67, no. 5, pp. 826-830, May 2020, doi: 10.1109/TCSII.2020.2984025.

X. Dong and A. Weisshaar, “Characterization of Partially Overlapped Inductors for Compact Layout Design in 130nm RFCMOS and 22nm FinFET Processes,” 2020 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Los Angeles, CA, USA, 2020, pp. 135-138, doi: 10.1109/RFIC49505.2020.9218398.

K. -D. Chu, S. Callender, Y. Wang, J. C. Rudell, S. Pellerano and C. Hull, “A Dual-Mode V-Band 2/4-Way Non-Uniform Power-Combining PA with +17.9-dBm Psat and 26.5-% PAE in 16-nm FinFET CMOS,” 2020 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Los Angeles, CA, USA, 2020, pp. 183-186, doi: 10.1109/RFIC49505.2020.9218381.

M. A. Hoque, M. Chahardori, P. Agarwal, M. A. Mokri and D. Heo, “Octave Frequency Range Triple-band Low Phase Noise K/Ka-Band VCO with a New Dual-path Inductor,” 2020 IEEE/MTT-S International Microwave Symposium (IMS), Los Angeles, CA, USA, 2020, pp. 341-344, doi: 10.1109/IMS30576.2020.9223770.

P. Agarwal, M. Chahardori and D. Heo, “An X-band LC VCO Using a New Boosted Active Capacitor With 53 % Tuning Range and -202.4 dBc/Hz FoMT,” 2020 IEEE/MTT-S International Microwave Symposium (IMS), Los Angeles, CA, USA, 2020, pp. 357-360, doi: 10.1109/IMS30576.2020.9223827.

B. Shen and M. L. Johnston, “DC-100 kHz Tunable Readout IC for Impedance Spectroscopy and Amperometric Measurement of Electrochemical Sensors,” 2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS), Springfield, MA, USA, 2020, pp. 651-654, doi: 10.1109/MWSCAS48704.2020.9184465.

L. Shi, E. Thaigarajan, R. Singh, E. Hancioglu, U. -K. Moon and G. Temes, “Noise-Shaping SAR ADC Using a Two-Capacitor Digitally Calibrated DAC with 85.1 dB DR and 91 dB SFDR,” 2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS), Springfield, MA, USA, 2020, pp. 353-356, doi: 10.1109/MWSCAS48704.2020.9184516.

E. Caceres, M. Kareppagoudr, J. Shakya and G. C. Temes, “Pseudo-Pseudo-Differential Multibit Delta-Sigma Modulator,” 2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS), Springfield, MA, USA, 2020, pp. 675-678, doi: 10.1109/MWSCAS48704.2020.9184623.

M. Kareppagoudr, J. Shakya, E. Caceres, Y. -W. Kuo and G. C. Temes, “Slewing Mitigation Technique for Switched Capacitor Circuits,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 67, no. 10, pp. 3251-3261, Oct. 2020, doi: 10.1109/TCSI.2020.2979836.

Y. Xu, H. Hu, J. Muhlestein and U. -K. Moon, “A 77-dB-DR 0.65-mW 20-MHz 5th-Order Coupled Source Followers Based Low-Pass Filter,” in IEEE Journal of Solid-State Circuits, vol. 55, no. 10, pp. 2810-2818, Oct. 2020, doi: 10.1109/JSSC.2020.3006790.

S. Gopal, S. Das, P. P. Pande and D. Heo, “A Hybrid 3D Interconnect With 2x Bandwidth Density Employing Orthogonal Simultaneous Bidirectional Signaling for 3D NoC,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 67, no. 11, pp. 3919-3932, Nov. 2020, doi: 10.1109/TCSI.2020.3013092.

2019

N. Tang, B. Nguyen, Y. Tang, W. Hong, Z. Zhou and D. Heo, “8.4 Fully Integrated Buck Converter with 78% Efficiency at 365mW Output Power Enabled by Switched-Inductor Capacitor Topology and Inductor Current Reduction Technique,” 2019 IEEE International Solid-State Circuits Conference – (ISSCC), San Francisco, CA, USA, 2019, pp. 152-154, doi: 10.1109/ISSCC.2019.8662530.

K. Clocker, S. Sengupta and M. L. Johnston, “A Fully-Integrated, Single-Element CMOS Anemometer,” in IEEE Sensors Letters, vol. 3, no. 2, pp. 1-4, Feb. 2019, Art no. 2500204, doi: 10.1109/LSENS.2019.2892467.

M. Katanbaf, K. -D. Chu, T. Zhang, C. Su and J. C. Rudell, “Two-Way Traffic Ahead: RF\/Analog Self-Interference Cancellation Techniques and the Challenges for Future Integrated Full-Duplex Transceivers,” in IEEE Microwave Magazine, vol. 20, no. 2, pp. 22-35, Feb. 2019, doi: 10.1109/MMM.2018.2880489.

S. N. Ali, P. Agarwal, S. Gopal, S. Mirabbasi and D. Heo, “A 25–35 GHz Neutralized Continuous Class-F CMOS Power Amplifier for 5G Mobile Communications Achieving 26% Modulation PAE at 1.5 Gb/s and 46.4% Peak PAE,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 66, no. 2, pp. 834-847, Feb. 2019, doi: 10.1109/TCSI.2018.2860019.

B. Shen, S. Bose and M. L. Johnston, “Fully-Integrated Charge Pump Design Optimization for Above-Breakdown Biasing of Single-Photon Avalanche Diodes in 0.13- μm CMOS,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 66, no. 3, pp. 1258-1269, March 2019, doi: 10.1109/TCSI.2018.2880217.

B. Shen, S. Bose and M. L. Johnston, “A 1.2 V–20 V Closed-Loop Charge Pump for High Dynamic Range Photodetector Array Biasing,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 66, no. 3, pp. 327-331, March 2019, doi: 10.1109/TCSII.2018.2850341.

N. Tang et al., “Analog-Assisted Digital Capacitorless Low-Dropout Regulator Supporting Wide Load Range,” in IEEE Transactions on Industrial Electronics, vol. 66, no. 3, pp. 1799-1808, March 2019, doi: 10.1109/TIE.2018.2840492.

Y. Wang and G. C. Temes, “Scaling for Optimum Dynamic Range and Noise-Power Tradeoff: A Review of Analog Circuit Design Techniques,” in IEEE Solid-State Circuits Magazine, vol. 11, no. 2, pp. 98-103, Spring 2019, doi: 10.1109/MSSC.2019.2910646.

M. Megahed, Y. Ramadass and T. Anand, “A Sub 1μW Switched Source + Capacitor Architecture Free of Top/Bottom Plate Parasitic Switching Loss Achieving Peak Efficiency of 80.66% at a Regulated 1.8V Output in 180nm,” 2019 IEEE Custom Integrated Circuits Conference (CICC), Austin, TX, USA, 2019, pp. 1-4, doi: 10.1109/CICC.2019.8780341.

B. Nguyen et al., “A Sub-1V Analog-Assisted Inverter-Based Digital Low-Dropout Regulator with a Fast Response Time at 25mA/100ps and 99.4% Current Efficiency,” 2019 IEEE Custom Integrated Circuits Conference (CICC), Austin, TX, USA, 2019, pp. 1-4, doi: 10.1109/CICC.2019.8780173.

L. Renaud, J. Baylon, S. Gopal, M. A. Hoque and D. Heo, “Analysis of Systematic Losses in Hybrid Envelope Tracking Modulators,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 66, no. 4, pp. 1319-1330, April 2019, doi: 10.1109/TCSI.2018.2883531.

T. He, M. Kareppagoudr, Y. Zhang, E. Caceres, U. -K. Moon and G. C. Temes, “Noise Filtering and Linearization of Single-Ended Sampled-Data Circuits,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 66, no. 4, pp. 1331-1341, April 2019, doi: 10.1109/TCSI.2018.2885802.

C. Y. Lee, A. ElShater, P. K. Venkatachala, H. Hu, B. Xiao and U. -K. Moon, “Application of Ring-Amplifiers for Low-Power Wide-Bandwidth Digital Subsampling ADC-PLL,” 2019 IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo, Japan, 2019, pp. 1-5, doi: 10.1109/ISCAS.2019.8702142.

A. V. Kayyil, P. K. Ramakrishna, O. Yong, D. J. Allstot and H. C. Yang, “A Two-Stage CMOS OTA with Load-Pole Cancellation,” 2019 IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo, Japan, 2019, pp. 1-5, doi: 10.1109/ISCAS.2019.8702347.

C. Y. Lee, P. K. Venkatachala, A. ElShater, B. Xiao, H. Hu and U. -K. Moon, “Cascoded Ring Amplifiers for High Speed and High Accuracy Settling,” 2019 IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo, Japan, 2019, pp. 1-5, doi: 10.1109/ISCAS.2019.8702710.

P. Payandehnia, H. Maghami, H. Mirzaie, M. L. Johnston and G. C. Temes, “An Amplifier-Free 0–2 SAR-VCO MASH ΔΣ ADC,” 2019 IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo, Japan, 2019, pp. 1-5, doi: 10.1109/ISCAS.2019.8702397.

S. Sengupta and M.L. Johnston, “Two-step, piecewise-linear SAR ADC with programmable transfer function,” Electronics Letters 55 (8), pp. 444-446, May 2019. https://doi.org/10.1049/el.2019.0138

Y. Liu and A. Natarajan, “A 60 GHz Polarization-Duplex TX/RX Front-End with Dual-Pol Antenna-IC Co-Integration in SiGe BiCMOS,” 2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Boston, MA, USA, 2019, pp. 127-130, doi: 10.1109/RFIC.2019.8701829.

M. Johnson et al., “A 4-element 28 GHz Millimeter-wave MIMO Array with Single-wire Interface using Code-Domain Multiplexing in 65 nm CMOS,” 2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Boston, MA, USA, 2019, pp. 243-246, doi: 10.1109/RFIC.2019.8701732.

S. N. Ali, M. Aminul Hoque, S. Gopal, M. Chahardori, M. A. Mokri and D. Heo, “A Continually-Stepped Variable-Gain LNA in 65-nm CMOS Enabled by a Tunable-Transformer for mm-Wave 5G Communications,” 2019 IEEE MTT-S International Microwave Symposium (IMS), Boston, MA, USA, 2019, pp. 926-929, doi: 10.1109/MWSYM.2019.8701023.

S. Gopal, M. Chahardori, M. A. Hoque, S. N. Ali, M. A. Mokri and D. Heo, “Dual-Equalization-Path Energy-Area-Efficient Near Field Inductive Coupling for Contactless 3D IC,” 2019 IEEE MTT-S International Microwave Symposium (IMS), Boston, MA, USA, 2019, pp. 742-745, doi: 10.1109/MWSYM.2019.8701097.

M. A. Hoque, S. N. Ali, M. A. Mokri, S. Gopal, M. Chahardori and D. Heo, “A Highly Efficient Dual-band Harmonic-tuned GaN RF Synchronous Rectifier with Integrated Coupler and Phase Shifter,” 2019 IEEE MTT-S International Microwave Symposium (IMS), Boston, MA, USA, 2019, pp. 1320-1323, doi: 10.1109/MWSYM.2019.8700900.

J. Baylon, P. Agarwal, L. Renaud, S. N. Ali and D. Heo, “A Ka-Band Dual-Band Digitally Controlled Oscillator With −195.1-dBc/Hz FoM T Based on a Compact High- Q Dual-Path Phase-Switched Inductor,” in IEEE Transactions on Microwave Theory and Techniques, vol. 67, no. 7, pp. 2748-2758, July 2019, doi: 10.1109/TMTT.2019.2917671.

S. N. Ali, P. Agarwal, S. Gopal and D. Heo, “Transformer-Based Predistortion Linearizer for High Linearity and High Modulation Efficiency in mm-Wave 5G CMOS Power Amplifiers,” in IEEE Transactions on Microwave Theory and Techniques, vol. 67, no. 7, pp. 3074-3087, July 2019, doi: 10.1109/TMTT.2019.2914900.

M. Kareppagoudr, E. Caceres, Y. -W. Kuo, J. Shakya, Y. Wang and G. C. Temes, “Passive slew rate enhancement technique for Switched-Capacitor Circuits,” 2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS), Dallas, TX, USA, 2019, pp. 913-916, doi: 10.1109/MWSCAS.2019.8885160.

Y. -W. Kuo, P. K. Ramakrishna, A. V. Kayyil and D. J. Allstot, “Low-Voltage Tracking RC Frequency Compensation in Two-Stage Operational Amplifiers,” 2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS), Dallas, TX, USA, 2019, pp. 782-785, doi: 10.1109/MWSCAS.2019.8885045.

M. Sadollahi and G. C. Temes, “A 10-MHz BW 77.9 dB SNDR DT MASH ΔΣ ADC With NC-VCO-Based Quantizer and OPAMP Sharing,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 66, no. 9, pp. 3384-3392, Sept. 2019, doi: 10.1109/TCSI.2019.2928591.

B. Xiao et al., “An 80mA Capacitor-Less LDO with 6.5µA Quiescent Current and No Frequency Compensation Using Adaptive-Deadzone Ring Amplifier,” 2019 IEEE Asian Solid-State Circuits Conference (A-SSCC), Macau, Macao, 2019, pp. 39-42, doi: 10.1109/A-SSCC47793.2019.9056970.

X. Dong, C. Masse, F. M. Rotella and A. Weisshaar, “Compact Layout Redesign of Output Matching Network of a 5.8-GHz SiGe Power Amplifier,” in IEEE Microwave and Wireless Components Letters, vol. 29, no. 12, pp. 791-794, Dec. 2019, doi: 10.1109/LMWC.2019.2948479.

A. Devaraj, M. Megahed, Y. Liu, A. Ramachandran and T. Anand, “A Switched Capacitor Multiple Input Single Output Energy Harvester (Solar + Piezo) Achieving 74.6% Efficiency With Simultaneous MPPT,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 66, no. 12, pp. 4876-4887, Dec. 2019, doi: 10.1109/TCSI.2019.2934985.

W. Hong et al., “A Dual-Output Step-Down Switched-Capacitor Voltage Regulator With a Flying Capacitor Crossing Technique for Enhanced Power Efficiency,” in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 27, no. 12, pp. 2861-2871, Dec. 2019, doi: 10.1109/TVLSI.2019.2930892.

2018

P. Payandehnia, J. L. Ceballos, G. C. Temes, “Noise-shaped filter implementation,” Electronics Letters 54 (1), 20-21, 2018. https://doi.org/10.1049/el.2017.3245

M. Sadollahi, K. Hamashita, K. Sobue and G. C. Temes, “An 11-Bit 250-nW 10-kS/s SAR ADC With Doubled Input Range for Biomedical Applications,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 65, no. 1, pp. 61-73, Jan. 2018, doi: 10.1109/TCSI.2017.2712066.

S. N. Ali, P. Agarwal, J. Baylon, S. Gopal, L. Renaud and D. Heo, “A 28GHz 41%-PAE linear CMOS power amplifier using a transformer-based AM-PM distortion-correction technique for 5G phased arrays,” 2018 IEEE International Solid-State Circuits Conference – (ISSCC), San Francisco, CA, USA, 2018, pp. 406-408, doi: 10.1109/ISSCC.2018.8310356.

K. -D. Chu, M. Katanbaf, T. Zhang, C. Su and J. C. Rudell, “A broadband and deep-TX self-interference cancellation technique for full-duplex and frequency-domain-duplex transceiver applications,” 2018 IEEE International Solid-State Circuits Conference – (ISSCC), San Francisco, CA, USA, 2018, pp. 170-172, doi: 10.1109/ISSCC.2018.8310238.

K. -D. Chu, M. Katanbaf, C. Su, T. Zhang and J. C. Rudell, “Integrated CMOS transceivers design towards flexible full duplex (FD) and frequency division duplex (FDD) systems,” 2018 IEEE Custom Integrated Circuits Conference (CICC), San Diego, CA, USA, 2018, pp. 1-11, doi: 10.1109/CICC.2018.8357010.

T. He and G. C. Temes, “System-level noise filtering and linearization,” 2018 IEEE Custom Integrated Circuits Conference (CICC), San Diego, CA, USA, 2018, pp. 1-8, doi: 10.1109/CICC.2018.8357015.

H. Ouh and M. L. Johnston, “Dual-mode, in-pixel linear and single-photon avalanche diode readout for low-light dynamic range extension in photodetector arrays,” 2018 IEEE Custom Integrated Circuits Conference (CICC), San Diego, CA, USA, 2018, pp. 1-4, doi: 10.1109/CICC.2018.8357037.

P. Agarwal, J. -H. Kim, P. P. Pande and D. Heo, “Zero-Power Feed-Forward Spur Cancelation for Supply-Regulated CMOS Ring PLLs,” in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 26, no. 4, pp. 653-662, April 2018, doi: 10.1109/TVLSI.2017.2788882.

S. N. Ali et al., “A 40% PAE Frequency-Reconfigurable CMOS Power Amplifier With Tunable Gate–Drain Neutralization for 28-GHz 5G Radios,” in IEEE Transactions on Microwave Theory and Techniques, vol. 66, no. 5, pp. 2231-2245, May 2018, doi: 10.1109/TMTT.2018.2801806.

H. Ouh and M. L. Johnston, “Code-Division Multiplex Encoding Analog Front End for Current-Mode Sensor Arrays,” in IEEE Solid-State Circuits Letters, vol. 1, no. 5, pp. 118-121, May 2018, doi: 10.1109/LSSC.2018.2875827.

P. K. Venkatachala et al., “Process Invariant Biasing of Ring Amplifiers Using Deadzone Regulation Circuit,” 2018 IEEE International Symposium on Circuits and Systems (ISCAS), Florence, Italy, 2018, pp. 1-5, doi: 10.1109/ISCAS.2018.8351242.

P. K. Venkatachala et al., “Passive Compensation for Improved Settling and Large Signal Stabilization of Ring Amplifiers,” 2018 IEEE International Symposium on Circuits and Systems (ISCAS), Florence, Italy, 2018, pp. 1-5, doi: 10.1109/ISCAS.2018.8351557.

S. Leuenberger et al., “An Empirical Study of the Settling Performance of Ring Amplifiers for Pipelined ADCs,” 2018 IEEE International Symposium on Circuits and Systems (ISCAS), Florence, Italy, 2018, pp. 1-5, doi: 10.1109/ISCAS.2018.8351073.

B. Xiao et al., “Power Optimized Comparator Selecting Method For Stochastic ADC,” 2018 IEEE International Symposium on Circuits and Systems (ISCAS), Florence, Italy, 2018, pp. 1-4, doi: 10.1109/ISCAS.2018.8351093.

J. Baylon, S. Gopal, L. Renaud, S. N. Ali and D. Heo, “A Low Power Active-Passive Dual Gm-boosted W-band Oscillator for Wireless Network-on-Chip Applications,” 2018 IEEE/MTT-S International Microwave Symposium – IMS, Philadelphia, PA, USA, 2018, pp. 1427-1430, doi: 10.1109/MWSYM.2018.8439862.

S. Gopal, P. Agarwal, S. N. Ali, J. Baylon and D. Heo, “An Echo-Canceller-Iess NFIC- TSV Hybrid 3D Interconnect for Simultaneous Bidirectional Vertical Communication,” 2018 IEEE/MTT-S International Microwave Symposium – IMS, Philadelphia, PA, USA, 2018, pp. 663-666, doi: 10.1109/MWSYM.2018.8439430.

T. Zhang, C. Su, A. Najafi and J. C. Rudell, “Wideband Dual-Injection Path Self-Interference Cancellation Architecture for Full-Duplex Transceivers,” in IEEE Journal of Solid-State Circuits, vol. 53, no. 6, pp. 1563-1576, June 2018, doi: 10.1109/JSSC.2018.2805874.

S. Bose, H. Ouh, S. Sengupta and M. L. Johnston, “Parametric Study of p-n Junctions and Structures for CMOS-Integrated Single-Photon Avalanche Diodes,” in IEEE Sensors Journal, vol. 18, no. 13, pp. 5291-5299, 1 July1, 2018, doi: 10.1109/JSEN.2018.2835762.

Y. Wang, L. Shi, T. He, Y. Zhang, C. -H. Chen and G. C. Temes, “Robust Continuous-Time MASH Delta Sigma Modulator,” 2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS), Windsor, ON, Canada, 2018, pp. 310-313, doi: 10.1109/MWSCAS.2018.8624017.

L. Shi, Y. Zhang, Y. Wang, M. Kareppagoudr, M. Sadollahi and G. C. Temes, “A 13b-ENOB Noise Shaping SAR ADC with a Two-Capacitor DAC,” 2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS), Windsor, ON, Canada, 2018, pp. 153-156, doi: 10.1109/MWSCAS.2018.8623994.

M. Sadollahi, L. Shi, Y. Wang and G. C. Temes, “Single-Loop Delta-Sigma ADC Using Noise-Coupled VCO Quantizer,” 2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS), Windsor, ON, Canada, 2018, pp. 149-152, doi: 10.1109/MWSCAS.2018.8623942.

B. Nguyen, N. Tang, W. Hong, Z. Zhou and D. Heo, “High-Efficiency Fully Integrated Switched-Capacitor Voltage Regulator for Battery-Connected Applications in Low-Breakdown Process Technologies,” in IEEE Transactions on Power Electronics, vol. 33, no. 8, pp. 6858-6868, Aug. 2018, doi: 10.1109/TPEL.2017.2757950.

S. Gopal et al., “A Spatial Multi-Bit Sub-1-V Time-Domain Matrix Multiplier Interface for Approximate Computing in 65-nm CMOS,” in IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 8, no. 3, pp. 506-518, Sept. 2018, doi: 10.1109/JETCAS.2018.2852624.

P. Payandehnia et al., “A 0.49–13.3 MHz Tunable Fourth-Order LPF with Complex Poles Achieving 28.7 dBm OIP3,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 65, no. 8, pp. 2353-2364, Aug. 2018, doi: 10.1109/TCSI.2017.2788466.

Jung, Y., Temes, G.C. Optimal dynamic range scaling of ΔΣ ADC using bias current estimation. Analog Integr Circ Sig Process 94, 405–412 (2018). https://doi.org/10.1007/s10470-017-1102-4

L. Zheng and A. Weisshaar, “Parameterised equivalent circuit model of frequency-dependent resistance and inductance for on-chip coplanar waveguides up to 110 GHz,” Electronics Letters 54 (16), pp. 986-988, Aug. 2018. https://doi.org/10.1049/el.2018.5362

M. Lindsay et al., “Heterogeneous Integration of CMOS Sensors and Fluidic Networks Using Wafer-Level Molding,” in IEEE Transactions on Biomedical Circuits and Systems, vol. 12, no. 5, pp. 1046-1055, Oct. 2018, doi: 10.1109/TBCAS.2018.2845867.

X. Dong and A. Weisshaar, “Design of Compact Integrated Lumped-Element Coupled-Resonator Filters,” 2018 IEEE 27th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS), San Jose, CA, USA, 2018, pp. 289-291, doi: 10.1109/EPEPS.2018.8534254.

J. Baylon et al., “A 16-Gb/s Low-Power Inductorless Wideband Gain-Boosted Baseband Amplifier With Skewed Differential Topology for Wireless Network-on-Chip,” in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 26, no. 11, pp. 2406-2418, Nov. 2018, doi: 10.1109/TVLSI.2018.2856890.

P. Payandehnia, H. Maghami, H. Mirzaie, G. C. Temes, “High-linearity SAR-VCO MASH ΔΣ ADC with second-order noise shaping,” Electronics Letters 54 (24), 1366-1368, 2018. https://doi.org/10.1049/el.2018.6779

S. Gopal, S. Das, P. Agarwal, S. N. Ali, D. Heo and P. P. Pande, “High-Performance and Small-Form Factor Near-Field Inductive Coupling for 3-D NoC,” in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 26, no. 12, pp. 2921-2934, Dec. 2018, doi: 10.1109/TVLSI.2018.2865704.

2017

T. Zhang, A. Najafi, C. Su and J. C. Rudell, “18.1 A 1.7-to-2.2GHz full-duplex transceiver system with >50dB self-interference cancellation over 42MHz bandwidth,” 2017 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, 2017, pp. 314-315, doi: 10.1109/ISSCC.2017.7870387.

Shanthi Pavan; Richard Schreier; Gabor C. Temes, Understanding Delta-Sigma Data Converters. Wiley-IEEE Press, 2017.

Y. Xu, J. Muhlestein and U. -K. Moon, “A 0.65mW 20MHz 5th-order low-pass filter with +28.8dBm IIP3 using source follower coupling,” 2017 IEEE Custom Integrated Circuits Conference (CICC), Austin, TX, USA, 2017, pp. 1-4, doi: 10.1109/CICC.2017.7993607.

Y. Zhang, C. -H. Chen, T. He and G. C. Temes, “A 16 b Multi-Step Incremental Analog-to-Digital Converter With Single-Opamp Multi-Slope Extended Counting,” in IEEE Journal of Solid-State Circuits, vol. 52, no. 4, pp. 1066-1076, April 2017, doi: 10.1109/JSSC.2016.2641466.

P. Payandehnia, H. Mirzaie, H. Maghami, J. Muhlestein, G. C. Temes, “Fully passive third-order noise shaping SAR ADC,” Electronics Letters 53 (8), pp. 528-530, April 2017. https://doi.org/10.1049/el.2017.0318

N. Tang et al., “Fully Integrated Buck Converter With Fourth-Order Low-Pass Filter,” in IEEE Transactions on Power Electronics, vol. 32, no. 5, pp. 3700-3707, May 2017, doi: 10.1109/TPEL.2016.2593049.

V. S. Shilimkar and A. Weisshaar, “Modeling of Metal-Fill Parasitic Capacitance and Application to On-Chip Slow-Wave Structures,” in IEEE Transactions on Microwave Theory and Techniques, vol. 65, no. 5, pp. 1456-1464, May 2017, doi: 10.1109/TMTT.2016.2647242.

Y. Wang, T. He, P. Silva, Y. Zhang, G. C. Temes, “Wide-band high-accuracy ΔΣ ADC using segmented DAC with DWA and mismatch shaping,” Electronics Letters 53 (11), pp. 713-714, May 2017. https://doi.org/10.1049/el.2017.1068

B. Shen, S. Bose and M. L. Johnston, “On-chip high-voltage SPAD bias generation using a dual-mode, closed-loop charge pump,” 2017 IEEE International Symposium on Circuits and Systems (ISCAS), Baltimore, MD, USA, 2017, pp. 1-4, doi: 10.1109/ISCAS.2017.8050855.

Y. Xu, P. K. Venkatachala and U. -K. Moon, “A highly compact wideband continuous-time transimpedance low-pass filter,” 2017 IEEE International Symposium on Circuits and Systems (ISCAS), Baltimore, MD, USA, 2017, pp. 1-4, doi: 10.1109/ISCAS.2017.8050678.

Jung, Y., Temes, G.C. A simple circuit technique to relax the feedback timing of ΔΣ ADC for high-speed and high-accuracy applications. Analog Integr Circ Sig Process 92, 219–223 (2017). https://doi.org/10.1007/s10470-017-0993-4

S. N. Ali, P. Agarwal, J. Baylon and D. Heo, “Reconfigurable high efficiency power amplifier with tunable coupling coefficient based transformer for 5G applications,” 2017 IEEE MTT-S International Microwave Symposium (IMS), Honololu, HI, USA, 2017, pp. 1177-1180, doi: 10.1109/MWSYM.2017.8058811.

J. Baylon, S. N. Ali, P. Agarwal, S. Gopal and D. Heo, “Current reuse triple-band signal source for multi-band wireless network-on-chip,” 2017 IEEE MTT-S International Microwave Symposium (IMS), Honololu, HI, USA, 2017, pp. 1141-1144, doi: 10.1109/MWSYM.2017.8058801.

P. Agarwal, S. N. Ali and D. Heo, “Reconfigurable phased-array design techniques for 5G and beyond communications,” 2017 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT), Seoul, Korea (South), 2017, pp. 53-55, doi: 10.1109/RFIT.2017.8048287.

S. N. Ali, P. Agarwal, S. Mirabbasi and D. Heo, “A 42–46.4% PAE continuous class-F power amplifier with Cgd neutralization at 26–34 GHz in 65 nm CMOS for 5G applications,” 2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Honolulu, HI, USA, 2017, pp. 212-215, doi: 10.1109/RFIC.2017.7969055.

P. Agarwal et al., “Switched Substrate-Shield-Based Low-Loss CMOS Inductors for Wide Tuning Range VCOs,” in IEEE Transactions on Microwave Theory and Techniques, vol. 65, no. 8, pp. 2964-2976, Aug. 2017, doi: 10.1109/TMTT.2017.2675423.

T. He, M. Kareppagoudr, U. -K. Moon, G. C. Temes and Y. Zhang, “Pseudo-pseudo-differential circuits,” 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS), Boston, MA, USA, 2017, pp. 1517-1520, doi: 10.1109/MWSCAS.2017.8053223.

T. He, C. -H. Chen, Y. Zhang and G. C. Temes, “Incremental ADC with parallel counting,” 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS), Boston, MA, USA, 2017, pp. 1017-1020, doi: 10.1109/MWSCAS.2017.8053099.

M. Sadollahi and G. Temes, “An 11-bit 250-nW 10-kS/s SAR ADC with doubled input range for biomedical applications,” 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS), Boston, MA, USA, 2017, pp. 385-388, doi: 10.1109/MWSCAS.2017.8052941.

M. Sadollahi and G. C. Temes, “Passive 3rd order delta-sigma ADC with VCO-based quantizer,” 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS), Boston, MA, USA, 2017, pp. 743-746, doi: 10.1109/MWSCAS.2017.8053030.

T. Zhang, Y. Chen, C. Huang and J. C. Rudell, “A low-noise reconfigurable full-duplex front-end with self-interference cancellation and harmonic-rejection power amplifier for low power radio applications,” ESSCIRC 2017 – 43rd IEEE European Solid State Circuits Conference, Leuven, Belgium, 2017, pp. 336-339, doi: 10.1109/ESSCIRC.2017.8094594.

Kun-Da Chu; Tong Zhang; Fucheng Yin; Jacques C. Rudell, “Self-interference (SI) Cancellation in Full-Duplex (FD) Radios,” in IEEE RFIC Virtual Journal, vol., no.9, 2017, doi: 10.1109/RFIC.2017.0000009.

L. Zheng, A. Weisshaar, “Compact Scalable Modeling of mmWave Spiral Inductors,” SRC TECHCON 2017.

Y. Liu and A. Natarajan, “60 GHz concurrent dual-polarization RX front-end in SiGe with Antenna-IC Co-Integration,” 2017 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), Miami, FL, USA, 2017, pp. 42-45, doi: 10.1109/BCTM.2017.8112907.

M. Lindsay et al., “Scalable hybrid integration of CMOS circuits and fluidic networks for biosensor applications,” 2017 IEEE Biomedical Circuits and Systems Conference (BioCAS), Turin, Italy, 2017, pp. 1-4, doi: 10.1109/BIOCAS.2017.8325553.

H. Ouh, S. Sengupta, S. Bose and M. L. Johnston, “Dual-mode, enhanced dynamic range CMOS optical sensor for biomedical applications,” 2017 IEEE Biomedical Circuits and Systems Conference (BioCAS), Turin, Italy, 2017, pp. 1-4, doi: 10.1109/BIOCAS.2017.8325065.

S. Sengupta, H. Ouh and M. L. Johnston, “An all-digital CMOS ambient light sensor using a single photon avalanche diode,” 2017 IEEE SENSORS, Glasgow, UK, 2017, pp. 1-3, doi: 10.1109/ICSENS.2017.8234047.

R. Garg and A. S. Natarajan, “A 28-GHz Low-Power Phased-Array Receiver Front-End With 360° RTPS Phase Shift Range,” in IEEE Transactions on Microwave Theory and Techniques, vol. 65, no. 11, pp. 4703-4714, Nov. 2017, doi: 10.1109/TMTT.2017.2707414.

S. N. Ali, T. Johnson and D. Heo, “DC Polarity Control in Radio Frequency Synchronous Rectifier Circuits,” in IEEE Microwave and Wireless Components Letters, vol. 27, no. 12, pp. 1107-1109, Dec. 2017, doi: 10.1109/LMWC.2017.2756850.

2016

Y. Wang, Y. Liu, A. Agrawal and A. Natarajan, “A 74.6GHz–83.6GHz digitally controlled oscillator with 370kHz frequency resolution in 65nm CMOS,” 2016 IEEE Radio and Wireless Symposium (RWS), Austin, TX, USA, 2016, pp. 176-178, doi: 10.1109/RWS.2016.7444397.

V. Bhagavatula, T. Zhang, A. R. Suvarna and J. C. Rudell, “An Ultra-Wideband IF Millimeter-Wave Receiver With a 20 GHz Channel Bandwidth Using Gain-Equalized Transformers,” in IEEE Journal of Solid-State Circuits, vol. 51, no. 2, pp. 323-331, Feb. 2016, doi: 10.1109/JSSC.2015.2504411.

Y. Liu, A. Agrawal and A. Natarajan, “Millimeter-Wave IC-Antenna Cointegration for Integrated Transmitters and Receivers,” in IEEE Antennas and Wireless Propagation Letters, vol. 15, pp. 1848-1852, 2016, doi: 10.1109/LAWP.2016.2539348.

S. P. Sah, P. Agarwal and D. Heo, “A low power sub-harmonic injection locked 2×2 mm-wave beamforming receiver array,” 2016 IEEE International Symposium on Circuits and Systems (ISCAS), Montreal, QC, Canada, 2016, pp. 1558-1561, doi: 10.1109/ISCAS.2016.7538860.

C. -H. Chen, Y. Zhang, T. He and G. C. Temes, “An incremental analog-to-digital converter with multi-step extended counting for sensor interfaces,” 2016 IEEE International Symposium on Circuits and Systems (ISCAS), Montreal, QC, Canada, 2016, pp. 77-80, doi: 10.1109/ISCAS.2016.7527174.

Y. Xu, P. K. Venkatachala, S. Leuenberger and U. -K. Moon, “A 7.5mW 35–70MHz 4th-order semi-passive charge-sharing band-pass filter with programmable bandwidth and 72dB stop-band rejection in 65nm CMOS,” 2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), San Francisco, CA, USA, 2016, pp. 162-165, doi: 10.1109/RFIC.2016.7508276.

T. N. Nguyen, P. Agarwal and D. Heo, “A 5.8 GHz and -192.9 dBc/Hz FoMT CMOS class-B capacitively-coupled VCO with Gm-enhancement,” 2016 IEEE MTT-S International Microwave Symposium (IMS), San Francisco, CA, USA, 2016, pp. 1-4, doi: 10.1109/MWSYM.2016.7540351.

Lei Zheng, A. R. Ferrara and A. Weisshaar, “Scalable modeling of resistive losses 1n on-chip interconnects at mm-wave frequencies,” 2016 IEEE MTT-S International Microwave Symposium (IMS), San Francisco, CA, 2016, pp. 1-4, doi: 10.1109/MWSYM.2016.7539976.

Y. Zhang, C. -H. Chen, T. He and G. C. Temes, “A 35µW 96.8dB SNDR 1 kHz BW multi-step incremental ADC using multi-slope extended counting with a single integrator,” 2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits), Honolulu, HI, USA, 2016, pp. 1-2, doi: 10.1109/VLSIC.2016.7573464.

A. R. Suvarna, V. Bhagavatula and J. C. Rudell, “Transformer-Based Tunable Matching Network Design Techniques in 40-nm CMOS,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 63, no. 7, pp. 658-662, July 2016, doi: 10.1109/TCSII.2016.2530258.

Y. Xu, U. Moon, “Charge-domain switched-gm-C CBPF using semi-passive charge-sharing technique,” Electronics Letters, volume 52, issue 20, pp. 1667-1669, Sept. 2016. https://doi.org/10.1049/el.2016.0942

C. -H. Chen, Y. Zhang and G. C. Temes, “History, present state-of-art and future of incremental ADCs,” ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, Lausanne, Switzerland, 2016, pp. 83-86, doi: 10.1109/ESSCIRC.2016.7598248.

Chen, CH., Zhang, Y., He, T., Temes, G.C. (2016). Micropower Incremental Analog-to-Digital Converters. In: Makinwa, K., Baschirotto, A., Harpe, P. (eds) Efficient Sensor Interfaces, Advanced Amplifiers and Low Power RF Systems. Springer, Cham. https://doi.org/10.1007/978-3-319-21185-5_2

P. Payandehnia, H. Maghami, M. Kareppagoudr, G. C. Temes, “Passive switched-capacitor filter with complex poles for high-speed applications,” Electronics Letters 52 (19), 1592-1594, 2016. https://doi.org/10.1049/el.2016.2487

L. Zheng, A. R. Ferrara and A. Weisshaar, “Scalable and broadband modeling of coupled on-chip spiral inductors up to 110 GHz,” 2016 IEEE 25th Conference on Electrical Performance Of Electronic Packaging And Systems (EPEPS), San Diego, CA, USA, 2016, pp. 25-28, doi: 10.1109/EPEPS.2016.7835410.

2015

X. Meng, Y. Zhang, T. He and G. C. Temes, “Low-Distortion Wideband Delta-Sigma ADCs With Shifted Loop Delays,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 62, no. 2, pp. 376-384, Feb. 2015, doi: 10.1109/TCSI.2014.2362972.

X. Yu, H. Rashtian, S. Mirabbasi, P. P. Pande and D. Heo, “An 18.7-Gb/s 60-GHz OOK Demodulator in 65-nm CMOS for Wireless Network-on-Chip,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 62, no. 3, pp. 799-806, March 2015, doi: 10.1109/TCSI.2014.2386751.

V. Behravan et al., “A compressed-sensing sensor-on-chip incorporating statistics collection to improve reconstruction performance,” 2015 IEEE Custom Integrated Circuits Conference (CICC), San Jose, CA, USA, 2015, pp. 1-4, doi: 10.1109/CICC.2015.7338429.

C.-H. Chen, T. He, and G.C. Temes, “Micro-power incremental ADCs,” Advances in Analog Circuit Design (AACD) Workshop Proceedings, pp. 1-19, April 21-23, 2015, Neuchatel, Switzerland (invited).

T. Zhang, A. R. Suvarna, V. Bhagavatula and J. C. Rudell, “An Integrated CMOS Passive Self-Interference Mitigation Technique for FDD Radios,” in IEEE Journal of Solid-State Circuits, vol. 50, no. 5, pp. 1176-1188, May 2015, doi: 10.1109/JSSC.2015.2408324.

V. Bhagavatula, M. Taghivand and J. C. Rudell, “A Compact 77% Fractional Bandwidth CMOS Band-Pass Distributed Amplifier With Mirror-Symmetric Norton Transforms,” in IEEE Journal of Solid-State Circuits, vol. 50, no. 5, pp. 1085-1093, May 2015, doi: 10.1109/JSSC.2015.2408322.

Y. Hu, S. Leuenberger, Y. Xu and U. -K. Moon, “Time-interleaved integrating quantizer incorporating channel coupling for speed and linearity enhancement,” 2015 IEEE International Symposium on Circuits and Systems (ISCAS), Lisbon, Portugal, 2015, pp. 2249-2252, doi: 10.1109/ISCAS.2015.7169130.

Y. Xu, S. Leuenberger and U. -K. Moon, “Highly linear continuous-time MASH ΔΣ ADC with dual VCO-based quantizers,” 2015 IEEE International Symposium on Circuits and Systems (ISCAS), Lisbon, Portugal, 2015, pp. 2033-2036, doi: 10.1109/ISCAS.2015.7169076.

M. Sadollahi and G. Temes, “Two-stage ΔΣ ADC with noise-coupled VCO-based quantizer,” 2015 IEEE International Symposium on Circuits and Systems (ISCAS), Lisbon, Portugal, 2015, pp. 305-308, doi: 10.1109/ISCAS.2015.7168631.

P. Payandehnia, A. F. Yeknami, X. Meng, C. Yang and G. C. Temes, “A passive CMOS low-pass filter for high speed and high SNDR applications,” 2015 IEEE International Symposium on Circuits and Systems (ISCAS), Lisbon, Portugal, 2015, pp. 285-288, doi: 10.1109/ISCAS.2015.7168626.

X. Meng, Y. Zhang, T. He, P. Payandehnia and G. C. Temes, “A noise-coupled time-interleaved delta-sigma modulator with shifted loop delays,” 2015 IEEE International Symposium on Circuits and Systems (ISCAS), Lisbon, Portugal, 2015, pp. 2045-2048, doi: 10.1109/ISCAS.2015.7169079.

Y. Liu, A. Agrawal and A. Natarajan, “Millimeter-wave IC Antenna cointegration for integrated transmitters and receivers,” Workshop on “Antenna and Packaging Technologies for mm-Wave Front-end Integration” at IEEE RFIC/IMS 2015.

Tai Nghia Nguyen, P. P. Pande and D. Heo, “A 64 GHz 5 mW low phase noise Gm-boosted colpitts CMOS VCO with self-switched biasing technique,” 2015 IEEE MTT-S International Microwave Symposium, Phoenix, AZ, USA, 2015, pp. 1-4, doi: 10.1109/MWSYM.2015.7167025.

P. Agarwal, Partha Pratim Pande and D. Heo, “25.3 GHz, 4.1 mW VCO with 34.8% tuning range using a switched substrate-shield inductor,” 2015 IEEE MTT-S International Microwave Symposium, Phoenix, AZ, USA, 2015, pp. 1-4, doi: 10.1109/MWSYM.2015.7166890.

C. H. Chen, Y. Zhang, T. He, G. C. Temes, “Two-step multi-stage incremental ADC,” Electronics Letters 51 (24), 1975-1977, 2015. https://doi.org/10.1049/el.2015.3005

T. He, Y. Zhang, G. C. Temes, “Digital excess loop delay compensation technique with embedded truncator for continuous-time delta–sigma modulators,” Electronics Letters 52 (1), 20-21, 2015. https://doi.org/10.1049/el.2015.1595

Y. Zhang, C. H. Chen, T. He, G. C. Temes, “Multi-step incremental ADC with extended binary counting,” Electronics Letters 52 (9), 697-699, 2015. https://doi.org/10.1049/el.2016.0151

C. -H. Chen, Y. Zhang, T. He, P. Y. Chiang and G. C. Temes, “A Micro-Power Two-Step Incremental Analog-to-Digital Converter,” in IEEE Journal of Solid-State Circuits, vol. 50, no. 8, pp. 1796-1808, Aug. 2015, doi: 10.1109/JSSC.2015.2413842.

X. Meng et al., “A 19.2-mW, 81.6-dB SNDR, 4-MHz bandwidth delta-sigma modulator with shifted loop delays,” ESSCIRC Conference 2015 – 41st European Solid-State Circuits Conference (ESSCIRC), Graz, Austria, 2015, pp. 221-224, doi: 10.1109/ESSCIRC.2015.7313867.

P. Agarwal, L. Renaud, J. Baylon, D. Majumdar, D. Heo and C. Schlegel, “2.45 GHz, 100 Mbps BPSK-DSSS transmitter for interference-robust wireless neuroprosthetic networks,” 2015 European Microwave Conference (EuMC), Paris, France, 2015, pp. 877-880, doi: 10.1109/EuMC.2015.7345904.

N. Tang, W. Hong, T. Ewing, H. Beyenal, J. -H. Kim and D. Heo, “A Self-Sustainable Power Management System for Reliable Power Scaling Up of Sediment Microbial Fuel Cells,” in IEEE Transactions on Power Electronics, vol. 30, no. 9, pp. 4626-4632, Sept. 2015, doi: 10.1109/TPEL.2015.2397931.

L. Zheng and A. Weisshaar, “Scalable and Compact Modeling of On-Chip Interconnects from DC to mm-Wave Frequencies,” Semiconductor Research Corporation (SRC) TECHCON 2015 Proceedings, September 2015, Austin, TX.

Y. Liu, A. Agrawal and A. Natarajan, “Millimeter-wave IC-Antenna Cointegration for integrated Transmitters and Receivers,” Semiconductor Research Corporation (SRC) TECHCON 2015 Proceedings, Austin, TX, Sept. 2015.

P. Agarwal and D. Heo, “11.5 GHz VCO with 56% Tuning Range Using Low-Loss Switched Negative- Capacitance and Inductance,” Semiconductor Research Corporation (SRC) TECHCON 2015 Proceedings, Sept. 2015, Austin, TX, USA.

Y. Hu, H. Venkatram, N. Maghari and U. -K. Moon, “A Continuous-Time ΔΣ ADC Utilizing Time Information for Two Cycles of Excess Loop Delay Compensation,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 62, no. 11, pp. 1063-1067, Nov. 2015, doi: 10.1109/TCSII.2015.2457011.

N. Tang, W. Hong, J. -H. Kim, Y. Yang and D. Heo, “A Sub-1-V Bulk-Driven Opamp With an Effective Transconductance-Stabilizing Technique,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 62, no. 11, pp. 1018-1022, Nov. 2015, doi: 10.1109/TCSII.2015.2455471.

C. -H. Chen, T. He, Y. Zhang and G. C. Temes, “Incremental Analog-to-Digital Converters for High-Resolution Energy-Efficient Sensor Interfaces,” in IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 5, no. 4, pp. 612-623, Dec. 2015, doi: 10.1109/JETCAS.2015.2502135.

2014

J. Cheng, N. Qi, P. Y. Chiang and A. Natarajan, “9.6 A 1.3mW 0.6V WBAN-compatible sub-sampling PSK receiver in 65nm CMOS,” 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC), San Francisco, CA, USA, 2014, pp. 168-169, doi: 10.1109/ISSCC.2014.6757385.

S. Weaver, B. Hershberg and U. -K. Moon, “Digitally Synthesized Stochastic Flash ADC Using Only Standard Digital Cells,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 61, no. 1, pp. 84-91, Jan. 2014, doi: 10.1109/TCSI.2013.2268571.

Y. Hu, Y. Xu and U. -K. Moon, “Inherently linear time symmetric pulse width modulation,” Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, San Jose, CA, USA, 2014, pp. 1-4, doi: 10.1109/CICC.2014.6946125.

C. -H. Chen, Y. Zhang, T. He, P. Y. Chiang and G. C. Temes, “A 11μW 250 Hz BW two-step incremental ADC with 100 dB DR and 91 dB SNDR for integrated sensor interfaces,” Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, San Jose, CA, USA, 2014, pp. 1-4, doi: 10.1109/CICC.2014.6945988.

T. Oh, H. Venkatram and U. -K. Moon, “A Time-Based Pipelined ADC Using Both Voltage and Time Domain Information,” in IEEE Journal of Solid-State Circuits, vol. 49, no. 4, pp. 961-971, April 2014, doi: 10.1109/JSSC.2013.2293019.

J. C. Rudell, V. Bhagavatula and W. C. Wesson, “Future integrated sensor radios for long-haul communication,” in IEEE Communications Magazine, vol. 52, no. 4, pp. 101-109, April 2014, doi: 10.1109/MCOM.2014.6807953.

X. Meng, Y. Zhang, T. He and G. C. Temes, “A noise-coupled low-distortion delta-sigma ADC with shifted loop delays,” 2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS), College Station, TX, USA, 2014, pp. 587-590, doi: 10.1109/MWSCAS.2014.6908483.

X. Meng and G. C. Temes, “Low-power duty-cycle tuned filters,” 2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS), College Station, TX, USA, 2014, pp. 1033-1036, doi: 10.1109/MWSCAS.2014.6908594.

X. Meng and G. C. Temes, “Bootstrapping techniques for floating switches in switched-capacitor circuits,” 2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS), College Station, TX, USA, 2014, pp. 398-401, doi: 10.1109/MWSCAS.2014.6908436.

P. Payandehnia, H. Maghami, X. Meng, G. C. Temes and H. Yoshizawa, “Sequential interstage correlated double sampling: A switched-capacitor technique for high accuracy systems,” 2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS), College Station, TX, USA, 2014, pp. 262-265, doi: 10.1109/MWSCAS.2014.6908402.

P. Payandehnia, X. Meng and G. C. Temes, “Multi-step counting ADC,” 2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS), College Station, TX, USA, 2014, pp. 17-20, doi: 10.1109/MWSCAS.2014.6908341.

X. Meng, T. He, Y. Zhang and G. C. Temes, “Double-sampled wideband delta-sigma ADCs with shifted loop delays,” 2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS), College Station, TX, USA, 2014, pp. 1045-1048, doi: 10.1109/MWSCAS.2014.6908597.

X. Meng, T. Wang and G. C. Temes, “A low-power parasitic-insensitive switched-capacitor integrator for Delta-Sigma ADCs,” 2014 IEEE International Symposium on Circuits and Systems (ISCAS), Melbourne, VIC, Australia, 2014, pp. 986-989, doi: 10.1109/ISCAS.2014.6865303.

X. Meng, W. Li and G. C. Temes, “A fully-differential input amplifier with band-pass filter for biosensors,” 2014 IEEE International Symposium on Circuits and Systems (ISCAS), Melbourne, VIC, Australia, 2014, pp. 21-24, doi: 10.1109/ISCAS.2014.6865055.

Y. Hu, F. Farahbakhshian and U. -K. Moon, “Time amplifiers based on phase accumulation,” 2014 IEEE International Symposium on Circuits and Systems (ISCAS), Melbourne, VIC, Australia, 2014, pp. 2349-2352, doi: 10.1109/ISCAS.2014.6865643.

S. P. Sah, P. Agarwal and D. Heo, “On the Effects of Mismatch on Quadrature Accuracy in Tapped-Capacitor Load Independent Quadrature LC-Oscillators,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 61, no. 5, pp. 1409-1415, May 2014, doi: 10.1109/TCSI.2013.2285695.

X. Meng, G. C. Temes, “Double-sampled wideband delta–sigma ADCs with shifted loop delays,” Electronics Letters 50 (11), 794-795, 2014. https://doi.org/10.1049/el.2014.0994

V. S. Shilimkar, S. G. Gaskill and A. Weisshaar, “Scalable modeling of on-chip spiral inductors including metal fill parasitics,” 2014 IEEE MTT-S International Microwave Symposium (IMS2014), Tampa, FL, USA, 2014, pp. 1-4, doi: 10.1109/MWSYM.2014.6848648.

S. P. Sah, P. Agarwal and D. Heo, “A low power 8th sub-harmonic injection locked receiver for mm-Wave beamforming applications,” 2014 IEEE Radio Frequency Integrated Circuits Symposium, Tampa, FL, USA, 2014, pp. 401-404, doi: 10.1109/RFIC.2014.6851752.

S. P. Sah and D. Heo, “An 8th sub-harmonic injection locked V-band VCO for low power LO routing in mm-wave beamformers,” 2014 IEEE Radio Frequency Integrated Circuits Symposium, Tampa, FL, USA, 2014, pp. 177-180, doi: 10.1109/RFIC.2014.6851690.

P. Agarwal, J. Baylon, S. P. Sah, D. Majumdar, D. Heo and C. Schlegel, “A 330 µW, Gm-boosted VCO with −205 dB FoMT and 35 % tuning range using class-b biasing,” 2014 IEEE MTT-S International Microwave Symposium (IMS2014), Tampa, FL, USA, 2014, pp. 1-4, doi: 10.1109/MWSYM.2014.6848518.

P. Agarwal, S. P. Sah and D. Heo, “A 4.8 mW, 4.4 dB NF, wideband LNA using positively coupled transformer for V-band applications,” 2014 IEEE MTT-S International Microwave Symposium (IMS2014), Tampa, FL, USA, 2014, pp. 1-3, doi: 10.1109/MWSYM.2014.6848638.

S. P. Sah and Deukhyoun Heo, “A 12 GHz IF bandwidth low power 5–17 GHz V-band positive transformer-feedback down-conversion mixer,” 2014 IEEE MTT-S International Microwave Symposium (IMS2014), Tampa, FL, USA, 2014, pp. 1-4, doi: 10.1109/MWSYM.2014.6848561.

S. P. Sah, D. Heo and S. Mirabbasi, “An inductively Gm enhanced 34-GHz VCO with gain linearization and switched transformer tuning,” 2014 IEEE MTT-S International Microwave Symposium (IMS2014), Tampa, FL, USA, 2014, pp. 1-4, doi: 10.1109/MWSYM.2014.6848633.

T. Zhang, A. R. Suvarna, V. Bhagavatula and J. C. Rudell, “An integrated CMOS passive transmitter leakage suppression technique for FDD Radios,” 2014 IEEE Radio Frequency Integrated Circuits Symposium, Tampa, FL, USA, 2014, pp. 43-46, doi: 10.1109/RFIC.2014.6851653.

V. Bhagavatula, M. Taghivand and J. C. Rudell, “A compact 24–54 GHz CMOS band-pass distributed amplifier for high fractional bandwidth signal amplification,” 2014 IEEE Radio Frequency Integrated Circuits Symposium, Tampa, FL, USA, 2014, pp. 71-74, doi: 10.1109/RFIC.2014.6851661. (winner of Best Student Paper Award)

H. Peng, N. Tang, Y. Yang and D. Heo, “CMOS Startup Charge Pump With Body Bias and Backward Control for Energy Harvesting Step-Up Converters,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 61, no. 6, pp. 1618-1628, June 2014, doi: 10.1109/TCSI.2013.2290823.

P. Agarwal, S.P. Sah, and D. Heo, “A Low Power, Sub-Harmonic Injection Locked Receiver for mm-Wave Beamforming Applications,” Semiconductor Research Corporation (SRC) TECHCON 2014 Proceedings, Austin, TX, Sept. 2014.

D. Sengupta, S. Gaskill and A. Weisshaar, “A lumped element circuit model for monolithic transformers in silicon-based RFICs,” 2014 IEEE 23rd Conference on Electrical Performance of Electronic Packaging and Systems, Portland, OR, USA, 2014, pp. 63-66, doi: 10.1109/EPEPS.2014.7103595.

L. Zheng, S. G. Gaskill and A. Weisshaar, “A scalable wideband equivalent circuit model for on-chip microstrips up to 110 GHz,” 2014 IEEE 23rd Conference on Electrical Performance of Electronic Packaging and Systems, Portland, OR, USA, 2014, pp. 141-144, doi: 10.1109/EPEPS.2014.7103617.

X. Yu, D. Heo, P.P. Pande, and S. Mirabbasi, “A 60-GHz LNA with Feed-Forward Bandwidth Extension Technique for Wireless NoC Application,” IEEE European Microwave Integrated Circuit Conference (EuMIC 2014) Proceedings, pp. 1472-1475, Oct. 2014.

S. P. Sah, Y. You, P. Agarwal and D. Heo, “A 8–40 GHz, 8 mW LNA with 27 dB peak gain and 5.2 dB NF for multiband applications,” 2014 9th European Microwave Integrated Circuit Conference, Rome, Italy, 2014, pp. 182-185, doi: 10.1109/EuMIC.2014.6997822.

X. Yu, S. P. Sah, H. Rashtian, S. Mirabbasi, P. P. Pande and D. Heo, “A 1.2-pJ/bit 16-Gb/s 60-GHz OOK Transmitter in 65-nm CMOS for Wireless Network-On-Chip,” in IEEE Transactions on Microwave Theory and Techniques, vol. 62, no. 10, pp. 2357-2369, Oct. 2014, doi: 10.1109/TMTT.2014.2347919.

X. Yu, J. Baylon, P. Wettin, D. Heo, P. P. Pande and S. Mirabbasi, “Architecture and Design of Multichannel Millimeter-Wave Wireless NoC,” in IEEE Design & Test, vol. 31, no. 6, pp. 19-28, Dec. 2014, doi: 10.1109/MDAT.2014.2322995.

2013

Y. Zhang, C. H. Chen, G. C. Temes, “Accuracy-enhanced switched-capacitor stages using low-gain opamps,” Electronics Letters 49 (1), 22-23, 2013. https://doi.org/10.1049/el.2012.3827

C. H. Chen, Y. Jung, J. L. Ceballos, G. C. Temes, “Multi-step extended-counting analogue-to-digital converters,” Electronics Letters 49 (1), 30-31, 2013. https://doi.org/10.1049/el.2012.3655

O. Rajaee and U. -K. Moon, “Highly Linear Noise-Shaped Pipelined ADC Utilizing a Relaxed Accuracy Front-End,” in IEEE Journal of Solid-State Circuits, vol. 48, no. 2, pp. 502-515, Feb. 2013, doi: 10.1109/JSSC.2012.2227605.

C. H. Chen, Y. Zhang, Y. Jung, T. He, J.L. Ceballos, G. C. Temes, “Two-step incremental analogue-to-digital converter,” Electronics Letters 49 (4), 250-251, 2013. https://doi.org/10.1049/el.2013.0104

J. Jung, P. Upadyaya, D. Heo, J.-H. Kim, B.-S. Kim, “Wide tuning range LC VCO with parallel coupled negative gm cells,” Electronic Letters 49 (9), pp. 627-628, April 2013. https://doi.org/10.1049/el.2012.4508

Tao Tong, Wenhuan Yu, Pavan K Hanumolu, Gabor C Temes, “Calibration technique for SAR analog-to-digital converters,” Analog Integrated Circuits and Signal Processing Vol. 73, Issue 1, pp. 301-309, 2012.

S. P. Sah, S. Zhu, T. N. Nguyen, X. Yu and D. Heo, “A 12–40 GHz low phase variation highly linear BiCMOS variable gain amplifier,” 2013 IEEE International Symposium on Circuits and Systems (ISCAS), Beijing, China, 2013, pp. 1119-1122, doi: 10.1109/ISCAS.2013.6572047.

S. P. Sah et al., “A V-band wide locking-range injection-locked CMOS VCO for wireless network-on-chip receiver,” 2013 IEEE MTT-S International Microwave Symposium Digest (MTT), Seattle, WA, USA, 2013, pp. 1-4, doi: 10.1109/MWSYM.2013.6697632.

T. Oh, H. Venkatram and U. -K. Moon, “A 70MS/s 69.3dB SNDR 38.2fJ/conversion-step time-based pipelined ADC,” 2013 Symposium on VLSI Circuits, Kyoto, Japan, 2013, pp. C96-C97.

T. Oh, N. Maghari and U. -K. Moon, “A Second-Order ΔΣ ADC Using Noise-Shaped Two-Step Integrating Quantizer,” in IEEE Journal of Solid-State Circuits, vol. 48, no. 6, pp. 1465-1474, June 2013, doi: 10.1109/JSSC.2013.2257491.

C. Donovana, A. Dewan, D. Heo, Z. Lewandowski, and H. Beyenal, “Sediment microbial fuel cell powering a submersible ultrasonic receiver: New approach to remote monitoring,” Journal of Power Sources, vol. 233, pp. 79-85, July 2013.

S. P. Sah, X. Yu and D. Heo, “Design and Analysis of a Wideband 15–35-GHz Quadrature Phase Shifter With Inductive Loading,” in IEEE Transactions on Microwave Theory and Techniques, vol. 61, no. 8, pp. 3024-3033, Aug. 2013, doi: 10.1109/TMTT.2013.2267749.

S.P. Sah and D. Heo, “A Low Power K− and Ka−band Receiver for Beamforming Applications,” Semiconductor Research Corporation (SRC) TECHCON 2013 Proceedings, Austin, TX, Sept. 2013.

V. S. Shilimkar, S. G. Gaskill, and A. Weisshaar, “Modeling and Characterization of Metal Fill Parasitics in Radio Frequency Integrated Circuits,” Semiconductor Research Corporation (SRC) TECHCON 2013 Proceedings, Austin, TX, Sept. 2013 (winner of Best of Session Award).

S. G. Gaskill, V. S. Shilimkar and A. Weisshaar, “High-frequency modeling of metal fill eddy-current loss in integrated circuits,” 2013 European Microwave Conference, Nuremberg, Germany, 2013, pp. 975-978, doi: 10.23919/EuMC.2013.6686822.

S. Zhu, Y. You, S. P. Sah, D. Heo and K. F. Warnick, “An 8-channel Ku band transmit beamformer with low gain/phase imbalance between channels,” 2013 European Microwave Conference, Nuremberg, Germany, 2013, pp. 947-950, doi: 10.23919/EuMC.2013.6686815.

S. P. Sah and D. Heo, “An ultra-wideband 15–35 GHz phase-shifter for beamforming applications,” 2013 European Microwave Integrated Circuit Conference, Nuremberg, Germany, 2013, pp. 264-267.

Y. You, S. Zhu, S. Sah, D. Heo and K. F. Warnick, “A low phase error X-band eight-channel SiGe PIN diode phased array receiver,” 2013 European Microwave Integrated Circuit Conference, Nuremberg, Germany, 2013, pp. 268-271.

P. Liu et al., “Design Techniques for Load-Independent Direct Bulk-Coupled Low Power QVCO,” in IEEE Transactions on Microwave Theory and Techniques, vol. 61, no. 10, pp. 3658-3665, Oct. 2013, doi: 10.1109/TMTT.2013.2279778.

P. Agarwal, S. P. Sah and D. Heo, “A low leakage pull-down network for PLL with 6.7 dB improvement in reference spur,” 2013 Asia-Pacific Microwave Conference Proceedings (APMC), Seoul, Korea (South), 2013, pp. 98-100, doi: 10.1109/APMC.2013.6695203.

Y. Zhang, C. H. Chen, G. C. Temes, “Efficient technique for excess loop delay compensation in continuous-time ΔΣ modulators,” Electronics Letters 49 (24), 1522-1523, 2013. https://doi.org/10.1049/el.2013.3470

V. S. Shilimkar, S. G. Gaskill and A. Weisshaar, “Broadband characterization of on-chip RF spiral inductor using multi-line TRL calibration,” 82nd ARFTG Microwave Measurement Conference, Columbus, OH, USA, 2013, pp. 1-4, doi: 10.1109/ARFTG-2.2013.6737354

2012

R. Pawlowski et al., “A 530mV 10-lane SIMD processor with variation resiliency in 45nm SOI,” 2012 IEEE International Solid-State Circuits Conference, San Francisco, CA, USA, 2012, pp. 492-494, doi: 10.1109/ISSCC.2012.6177105.

L. Xia, J. Wang, W. Beattie, J. Postman and P. Y. Chiang, “Sub-2-ps, Static Phase Error Calibration Technique Incorporating Measurement Uncertainty Cancellation for Multi-Gigahertz Time-Interleaved T/H Circuits,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 59, no. 2, pp. 276-284, Feb. 2012, doi: 10.1109/TCSI.2011.2162382.

J. Cheng et al., “A near-threshold, multi-node, wireless body area sensor network powered by RF energy harvesting,” Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, San Jose, CA, USA, 2012, pp. 1-4, doi: 10.1109/CICC.2012.6330681.

S. Gupta, D. Gangopadhyay, H. Lakdawala, J. C. Rudell and D. J. Allstot, “A 0.8–2 GHz Fully-Integrated QPLL-Timed Direct-RF-Sampling Bandpass ΣΔ ADC in 0.13 μm CMOS,” in IEEE Journal of Solid-State Circuits, vol. 47, no. 5, pp. 1141-1153, May 2012, doi: 10.1109/JSSC.2012.2185530.

P. Liu, P. Sun, J. Jung, D. Heo, “PLL charge pump with adaptive body-bias compensation for minimum current variation,” Electronics letters 48 (1), pp. 16-18, 2012. https://doi.org/10.1049/el.2011.2835

T. Oh, H. Venkatram, J. Guerber and U. -K. Moon, “Correlated jitter sampling for jitter cancellation in pipelined TDC,” 2012 IEEE International Symposium on Circuits and Systems (ISCAS), Seoul, Korea (South), 2012, pp. 810-813, doi: 10.1109/ISCAS.2012.6272164.

J. Guerber, H. Venkatram, T. Oh and U. -K. Moon, “Enhanced SAR ADC energy efficiency from the early reset merged capacitor switching algorithm,” 2012 IEEE International Symposium on Circuits and Systems (ISCAS), Seoul, Korea (South), 2012, pp. 2361-2364, doi: 10.1109/ISCAS.2012.6271770.

V. Bhagavatula and J. C. Rudell, “Transformer feedback based CMOS amplifiers,” 2012 IEEE International Symposium on Circuits and Systems (ISCAS), Seoul, Korea (South), 2012, pp. 237-240, doi: 10.1109/ISCAS.2012.6271773.

W. Li, T. Wang, J. Cao, and G. C. Temes, “Teraohm on-chip resistance realisation using switched capacitor topologies,” Electronics Letters 48 (11), 2012. https://doi.org/10.1049/el.2012.0767

T. Tong, W. Yu, P. K. Hanumolu and G. C. Temes, “Calibration technique for SAR analog-to-digital converters,” 2012 IEEE International Symposium on Circuits and Systems (ISCAS), Seoul, Korea (South), 2012, pp. 2993-2996, doi: 10.1109/ISCAS.2012.6271947.

W. Li, T. Wang and G. C. Temes, “Digital foreground calibration methods for SAR ADCs,” 2012 IEEE International Symposium on Circuits and Systems (ISCAS), Seoul, Korea (South), 2012, pp. 1054-1057, doi: 10.1109/ISCAS.2012.6271410.

J. Cao, R. Raich, G. C. Temes and G. Cauwenberghs, “Multi-channel mixed-signal noise source with applications to stochastic equalization,” 2012 IEEE International Symposium on Circuits and Systems (ISCAS), Seoul, Korea (South), 2012, pp. 2497-2500, doi: 10.1109/ISCAS.2012.6271808.

C. -H. Chen, J. Crop, J. Chae, P. Chiang and G. C. Temes, “A 12-bit 7 µW/channel 1 kHz/channel incremental ADC for biosensor interface circuits,” 2012 IEEE International Symposium on Circuits and Systems (ISCAS), Seoul, Korea (South), 2012, pp. 2969-2972, doi: 10.1109/ISCAS.2012.6271940.

T. Wang, W. Li, H. Yoshizawa, M. Aslan and G. C. Temes, “A 101 dB DR 1.1 mW audio delta-sigma modulator with direct-charge-transfer adder and noise shaping enhancement,” 2012 IEEE Asian Solid State Circuits Conference (A-SSCC), Kobe, Japan, 2012, pp. 249-252, doi: 10.1109/IPEC.2012.6522672.

Y. Jung, S. Lee, C.-H. Chen, G. C. Temes, “Double noise coupling ΔΣ analogue-to-digital converter,” Electronics letters 48 (10), 557-558, May 2012. https://doi.org/10.1049/el.2012.0272

T. Oh, N. Maghari and U. -K. Moon, “A 5MHz BW 70.7dB SNDR noise-shaped two-step quantizer based ΔΣ ADC,” 2012 Symposium on VLSI Circuits (VLSIC), Honolulu, HI, USA, 2012, pp. 162-163, doi: 10.1109/VLSIC.2012.6243840.

W. Yu and G. C. Temes, “Digital DAC calibration technique for DS and incremental modulators,” Electronics letters 48 (13), 754-755, June 2012.

W. Wesson, V. Bhagavatula, K. W. Pang, S. Shin, P. Yang and J. C. Rudell, “A long-range, fully-integrated, regulator-less CMOS power amplifier for wireless sensor communications,” 2012 IEEE Radio Frequency Integrated Circuits Symposium, Montreal, QC, Canada, 2012, pp. 145-148, doi: 10.1109/RFIC.2012.6242251.

V. S. Shilimkar, S. G. Gaskill and A. Weisshaar, “Efficient modeling of metal fill parasitic capacitance in on-chip transmission lines,” 2012 IEEE/MTT-S International Microwave Symposium Digest, Montreal, QC, Canada, 2012, pp. 1-3, doi: 10.1109/MWSYM.2012.6259749.

Peng Liu, S. P. Sah, Jaeyoung Jung, P. Upadhyaya and Deukhyoun Heo, “Load independent bulk-coupled low power quadrature LC VCO,” 2012 IEEE/MTT-S International Microwave Symposium Digest, Montreal, QC, 2012, pp. 1-3, doi: 10.1109/MWSYM.2012.6259637.

A. O. Mikul, Siqi Zhu, P. Sun, Yu You, S. P. Sah and Deukhyoun Heo, “Compact low phase imbalance broadband attenuator based on SiGe PIN diode,” 2012 IEEE/MTT-S International Microwave Symposium Digest, Montreal, QC, Canada, 2012, pp. 1-3, doi: 10.1109/MWSYM.2012.6259653.

J. C. Rudell and V. Bhagavatula, “Strategies for highly-integrated long-range silicon transceivers for sensor data communication,” 2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS), Boise, ID, USA, 2012, pp. 690-693, doi: 10.1109/MWSCAS.2012.6292114.

X. Meng, T. Wang, G. C. Temes, “Charge compensation technique for switched-capacitor circuits,” Electronics letters 48 (16), 988-990, Aug. 2012.

J. Guerber, M. Gande and U. -K. Moon, “The Analysis and Application of Redundant Multistage ADC Resolution Improvements Through PDF Residue Shaping,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 59, no. 8, pp. 1733-1742, Aug. 2012, doi: 10.1109/TCSI.2011.2180435.

Tao Tong, Pavan K Hanumolu, Gabor C Temes, “A semi-synchronous SAR ADC,” Analog Integrated Circuits and Signal Processing Vol. 71, Issue 3, pp 407-410, 2012.

S. Zhu, A.O. Mikul, P. Sun, Y. You, Jong-Hoon Kim, Byeong-Sam Kim, and Deukhyoun Heo, “Inductor-less SiGe pin diode attenuator with low phase variations,” Electronics Letters 48, (20), pp. 1287 – 1289, Sept. 2012. https://doi.org/10.1049/el.2012.2151

T. Jiang, W. Liu, F. Y. Zhong, C. Zhong, K. Hu and P. Y. Chiang, “A Single-Channel, 1.25-GS/s, 6-bit, 6.08-mW Asynchronous Successive-Approximation ADC With Improved Feedback Delay in 40-nm CMOS,” in IEEE Journal of Solid-State Circuits, vol. 47, no. 10, pp. 2444-2453, Oct. 2012, doi: 10.1109/JSSC.2012.2204543.

J. Guerber, H. Venkatram, M. Gande, A. Waters and U. -K. Moon, “A 10-b Ternary SAR ADC With Quantization Time Information Utilization,” in IEEE Journal of Solid-State Circuits, vol. 47, no. 11, pp. 2604-2613, Nov. 2012, doi: 10.1109/JSSC.2012.2211696.

Nam-Jin Oh, Deuk Heo, “A low-power, low phase noise CMOS VCO with suppression of 1/f flicker noise up-conversion,” IEICE Electronics Express, vol. 9, no. 24, pp. 1881-1886, Dec. 2012. https://doi.org/10.1587/elex.9.1881.